Estimated reading time: 2 minutes

Beyond Design: Crosstalk Margins

What is an acceptable level of crosstalk? That depends on the technology being used, and this level has changed quite dramatically over the years, going from TTL logic devices to today’s high-speed Gbps devices. The amount of power a CPU uses, and thus the amount of heat it dissipates, is the product of the voltage and the current it draws. The trend is towards lower core voltages, which conserves power. But reducing the core voltage also reduces the noise margin. In this month’s column, I will delve into the threshold of acceptable crosstalk and how to mitigate its impact on high-speed designs.

Crosstalk is caused by the coupling of the electromagnetic fields. Electric fields cause signal voltages to capacitively couple into nearby traces. Capacitive coupling draws a surge of drive current, which causes reflections on the transmission lines. Whereas, magnetic fields cause signal currents to be induced into nearby traces. Inductive coupling produces ground bounce and power supply noise. Crosstalk falls off rapidly with the square of the distance and the degree of impact is related to the aggressor signal voltage, available board real estate and thus the proximity of signal traces. Crosstalk can appear as either far-end, forward crosstalk (FEXT) or near-end, reverse crosstalk (NEXT).

Fortunately, synchronous buses, as typically used for parallel data signal transfer, benefit from an extraordinary immunity to crosstalk. Crosstalk only occurs when the signals are being switched and this crosstalk only has an impact within a small window around the moment of the clocking.  The crosstalk must be specified during the setup (t_S) and hold (t_H) window at the receiver. During this interval, the crosstalk must never drive any valid signal across the receive threshold to the opposite logic state. So, providing the receiver waits sufficiently long enough for the crosstalk to settle, before sampling the bus, the crosstalk has no impact on the signal quality at the receiver. If the crosstalk arrives during the signal transitions, then its only impact is jitter on the eye. However, this only applies to signals within the same group.  Asynchronous and unrelated signals, on the other hand, remain sensitive to crosstalk at all times.

Unfortunately, due to the ever-increasing speed of digital signals, one may not have the luxury of waiting so long to sample the bus. And as the supply voltage drops from say 3.3V to 1.5V, then the allowable noise margin more than halves making the circuit designer’s decisions regarding crosstalk even more crucial. Crosstalk creates noise that erodes the noise margin. This noise may not be so great that it alone will cause a bit failure, but it can be enough to push the total noise over the edge.

To read this entire column, which appeared in the July 2018 issue of Design007 Magazine, click here.