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Current IssueLearning to Speak ‘Fab’
Our expert contributors clear up many of the miscommunication problems between PCB designers and their fab and assembly stakeholders. As you will see, a little extra planning early in the design cycle can go a long way toward maintaining open lines of communication with the fab and assembly folks.
Training New Designers
Where will we find the next generation of PCB designers and design engineers? Once we locate them, how will we train and educate them? What will PCB designers of the future need to master to deal with tomorrow’s technology?
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Our expert contributors peer into their crystal balls and offer their thoughts on the designers and design engineers of tomorrow, and what their jobs will look like.
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Mentor White Paper: Lean NPI at Optimum Design Associates
February 18, 2019 | Mentor, a Siemens businessEstimated reading time: Less than a minute
This is the first in a series of three white papers which discuss Optimum Design Associates’ business processes. For more than 20 years, Optimum Design Associates has offered its customers PCB design and layout services, and also bare-board assembly.
In this paper, designers will learn about ODA’s approach to integrating PCB layout and Valor NPI tools with ODB++ data output in order to achieve best practice Lean NPI.
To download this white paper, click here.
Suggested Items
Ventec International Group Announce Launch of VT-47LT IPC4101 /126 Prepreg for HDI
03/12/2025 | Ventec International GroupVentec International Group announce launch of VT-47LT IPC4101 / 126 Prepreg. Are Microvia Failures Plaguing Your HDI Any Layer Designs? High-density interconnect (HDI) designs are pushing the envelope - higher layer count HDI relies on complex microvia designs: skip vias, staggered microvias, and stacked microvias in sequential laminations.
TI Introduces the World's Smallest MCU, Enabling Innovation in the Tiniest of Applications
03/12/2025 | PRNewswireTexas Instruments (TI) introduced the world's smallest MCU, expanding its comprehensive Arm® Cortex®-M0+ MSPM0 MCU portfolio. Measuring only 1.38mm2, about the size of a black pepper flake, the wafer chip-scale package (WCSP) for the MSPM0C1104 MCU enables designers to optimize board space in applications such as medical wearables and personal electronics, without compromising performance.
Speaking the Same Language as Your Fabricator
03/12/2025 | Andy Shaughnessy, Design007 MagazineWe do indeed have a failure to communicate; designers and fabricators often seem to be talking past each other, which can lead to jobs being put on hold. We asked Jen Kolar, VP of engineering for Monsoon Solutions, and columnist Kelly Dack to share their thoughts on ways that we can break down the communication barrier between design and fabrication. As they point out, a design kickoff checklist and a solid review process can be invaluable tools in a designer’s toolbox.
IPC Releases Latest List of Standards and Revisions
03/12/2025 | IPCEach quarter, IPC releases a list of standards that are new or have been updated. To view a complete list of newly published standards and standards revisions, translations, proposed standards for ballot, final drafts for industry review, working drafts, and project approvals, visit ipc.org/status. These are the latest releases for Q1 2025.
The Shaughnessy Report: Breaking Down the Language Barrier
03/11/2025 | Andy Shaughnessy -- Column: The Shaughnessy ReportAccording to Ethnologue’s 2024 update, there are currently 7,164 living languages being spoken today. It makes you wonder: Do they count PCB design as a language? PCB fabrication? Assembly?