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Floor planning decisions can make or break performance, manufacturability, and timelines. This month’s contributors weigh in with their best practices for proper floor planning and specific strategies to get it right.
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A strong design constraint strategy carefully balances a wide range of electrical and manufacturing trade-offs. This month, we explore the key requirements, common challenges, and best practices behind building an effective constraint strategy.
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Most designers favor manual routing, but today's interactive autorouters may be changing designers' minds by allowing users more direct control. In this issue, our expert contributors discuss a variety of manual and autorouting strategies.
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Cadence Webinar: Preventing EMC Problems in IC Package and PCB Designs
March 8, 2019 | Cadence Design Systems, Inc.Estimated reading time: Less than a minute
EMC compliance is required by all commercial electronic devices to ensure safety, compatibility, and reliable operation.
Cadence Sigrity technology provides fast and accurate design analysis and performance verification without the need of a physical prototype—giving you powerful early issue detection and streamlined resolution.
Join Cadence Education Services and signal integrity/power integrity (SI/PI) expert Srdjan Djordjevic on March 14, 2019, 16:00 CET, for a free one-hour live webinar to find out what SI/PI analysis tools can do for you.
The webinar will show you how to include EMC simulations and analysis early in the design stage to help avoid costly redesigns. The demo utilizes the Sigrity PowerSIand OptimizePI (frequency domain) tools to show how SI/PI analysis supports EMC analysis and uses post-processing steps to identify radiated emissions.
Cadence Sigrity technology supports all layout systems (Mentor, Zuken, Altium, Cadence Allegro, Cadence SiP, Cadence Allegro Package Designer, and others)—giving you maximum flexibility with optimal compatibility.
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Coming Soon: The Advanced Electronics Packaging Digest
08/27/2025 | Marcy LaRont, I-Connect007The upcoming Advanced Electronics Packaging Digest is a curated, condensed monthly publication designed to keep you informed and engaged with the fast-moving world of advanced electronics packaging (AEP). In our inaugural September issue, we will begin at the foundation with an in-depth interview featuring Matt Kelly, CTO of the Global Electronics Association. Kelly and his Technology Solutions Team approach advanced packaging from a holistic systems perspective.
Nordson Reports Q3 Fiscal 2025 Results and Updates Full Year Guidance
08/21/2025 | BUSINESS WIRENordson Corporation reported results for the fiscal third quarter ended July 31, 2025. Sales were $742 million compared to the prior year’s third quarter sales of $662 million.
Haylo Labs Acquires Plessey Semiconductors
08/20/2025 | Haylo LabsHaylo Labs has acquired Plessey Semiconductors, the UK’s leading innovator in microLED display technology.
SoftBank Group and Intel Corporation Sign $2B Investment Agreement
08/19/2025 | Intel CorporationSoftBank Group Corp. and Intel Corporation today announced their signing of a definitive securities purchase agreement, under which SoftBank will make a $2 billion investment in Intel common stock.
20 Years of Center Nanoelectronic Technologies (CNT) – Backbone of German Semiconductor Research Celebrates Anniversary
08/14/2025 | Fraunhofer IPMSThe Center Nanoelectronic Technologies (CNT) of the Fraunhofer Institute for Photonic Microsystems (IPMS) is celebrating its 20th anniversary this year. Since its founding in 2005, it has developed into a pillar of applied semiconductor research in Germany and Europe. With its unique research cleanroom and equipment adhering to the 300-mm wafer industry standard, CNT is unparalleled in Germany and serves as a central innovation driver for the microelectronics industry.