-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueCreating the Ideal Data Package
Why is it so difficult to create the ideal data package? Many of these simple errors can be alleviated by paying attention to detail—and knowing what issues to look out for. So, this month, our experts weigh in on the best practices for creating the ideal design data package for your design.
Designing Through the Noise
Our experts discuss the constantly evolving world of RF design, including the many tradeoffs, material considerations, and design tips and techniques that designers and design engineers need to know to succeed in this high-frequency realm.
Learning to Speak ‘Fab’
Our expert contributors clear up many of the miscommunication problems between PCB designers and their fab and assembly stakeholders. As you will see, a little extra planning early in the design cycle can go a long way toward maintaining open lines of communication with the fab and assembly folks.
- Articles
- Columns
Search Console
- Links
- Media kit
||| MENU - design007 Magazine
DVCon U.S. 2020 Advance Program Available & Early Registration Open
December 5, 2019 | GlobeNewswireEstimated reading time: 3 minutes

The 2020 Design and Verification Conference and Exhibition (DVCon) U.S. advance program is now available online and registration is open. DVCon U.S will be held March 2-5 at the DoubleTree Hotel in San Jose, California. Sponsored by Accellera Systems Initiative, DVCon U.S. is expected to attract over a thousand participants eager to learn about the latest in design and verification standards and solutions.
“Now in its 32nd year, DVCon U.S. has established itself as the must-attend industry and user-focused conference for practicing design and verification engineers, EDA developers and design managers, focusing on design and verification of electronic systems and integrated circuits,” stated Aparna Dey, DVCon U.S. 2020 General Chair. “We received over 160 outstanding submissions for papers, panels, tutorials, and short workshops from the best technical minds and organizations in the industry. Our focus on the users of Accellera standard EDA languages, tools, and methodologies continues to be a hallmark of DVCon. Attendees can expect to learn about both practical solutions to their pressing problems and preview the technologies that will affect them in the near future.”
The conference begins on Monday, March 2 with Accellera Day featuring a full morning tutorial focused on Portable Stimulus. There will be two Accellera-sponsored short workshops in the afternoon, one focused on SystemC case studies and the other on IP Security Assurance. Four additional vendor-sponsored short workshops will be conducted Monday afternoon. The Accellera sponsored luncheon on Monday will include the presentation of Accellera’s annual Technical Excellence Award. The DVCon Expo and reception will follow the afternoon short workshops and will begin at 5:00pm.
This year’s keynote, “Artificial Intelligence for Design Automation,” will be given by Dr. Anirudh Devgan, president of Cadence Design Systems, Inc. Dr. Devgan’s talk will review the latest trends in artificial intelligence and machine learning and their impact on the EDA industry. He will examine how deep learning will chart a path beyond current practices, moving toward intelligent system design for an AI-enabled future.
There will be two panel sessions on Wednesday, March 4. The first panel, “New Chip Designs Create Tidal Wave of Change,” will address the need for a more thorough verification methodology as complexity converges with open source initiatives such as RISC-V. The second panel, “Predicting the Verification Flow of the Future,” will focus on what’s straining today’s verification environment and what might be needed to support future applications. Both panels will provide thought-provoking perspectives for attendees to consider and offer attendees an opportunity to ask their own insightful questions.
Attendees can choose from a broad selection of 42 papers, four tutorials, approximately 23 posters and 10 short workshops over the course of the four-day technical conference and exhibition.
The Expo, held Monday from 5:00pm to 7:00pm and Tuesday and Wednesday from 2:30pm to 6:00pm, will give attendees plenty of opportunities to meet with peers and experts in the design and verification community.
For the complete DVCon U.S. 2020 schedule, including a list of tutorials, short workshops, panels, sponsored luncheons and events, visit the program agenda. To view the videos from the DVCon U.S. 2019 Accellera Day tutorials, visit http://www.accellera.org/resources/videos/.
Advance registration rates are available through January 27, 2020. For more information and to register, visit the registration page.
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera SystemsInitiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP) and electronic design automation (EDA) companies. In response to global interest, in addition to DVCon U.S., Accellera also sponsors events in China, Europe and India. For more information about Accellera, please visit www.accellera.org. For more information about DVCon U.S., please visit www.dvcon.org. Follow DVCon on Facebook https://www.facebook.com/DvCon or @dvcon_us on Twitter or to comment, please use #dvcon_us.
Suggested Items
I-Connect007 Editor’s Choice: Five Must-Reads for the Week
05/09/2025 | Andy Shaughnessy, Design007 MagazineTrade show season is wrapping up as we head into summer. Where has the time gone? I hope you all get the chance to take a vacation this year, because I know you’ve earned one. Speaking of which, when was my last vacay? If I can’t remember, it’s probably time for one. It’s been a busy week in electronics, with fallout from the back-and-forth on tariffs taking up most of the oxygen in the room. We have quite an assortment of articles and columns for you in this installment of Must-Reads. See you next time.
Imec Coordinates EU Chips Design Platform
05/09/2025 | ImecA consortium of 12 European partners, coordinated by imec, has been selected in the framework of the European Chips Act to develop the EU Chips Design Platform.
New Issue of Design007 Magazine: Are Your Data Packages Less Than Ideal?
05/09/2025 | I-Connect007 Editorial TeamWhy is it so difficult to create the ideal data package? Many of these simple errors can be alleviated by paying attention to detail—and knowing what issues to look out for. So, this month, our experts weigh in on the best practices for creating the ideal data package for your design.
RF PCB Design Tips and Tricks
05/08/2025 | Cherie Litson, EPTAC MIT CID/CID+There are many great books, videos, and information online about designing PCBs for RF circuits. A few of my favorite RF sources are Hans Rosenberg, Stephen Chavez, and Rick Hartley, but there are many more. These PCB design engineers have a very good perspective on what it takes to take an RF design from schematic concept to PCB layout.
Cadence Unveils Millennium M2000 Supercomputer with NVIDIA Blackwell Systems
05/08/2025 | Cadence Design SystemsAt its annual flagship user event, CadenceLIVE Silicon Valley 2025, Cadence announced a major expansion of its Cadence® Millennium™ Enterprise Platform with the introduction of the new Millennium M2000 Supercomputer featuring NVIDIA Blackwell systems, which delivers AI-accelerated simulation at unprecedented speed and scale across engineering and drug design workloads.