Just Ask Heidi: The Biggest Challenge for Design Engineers?

Estimated reading time: 1 minute

First, we asked you to send in your questions for Happy Holden, Joe Fjelstad, Eric Camden, John Mitchell, and Tara Dunn in our “Just Ask” series. Now, it’s Heidi Barnes’s turn! Heidi is a senior signal and power integrity engineer at Keysight Technologies. She has written over 20 papers on SI and PI, and she is an active member in developing the new IEEE P370 standard involving interconnect S-parameter quality after fixture removal. Heidi has been awarded five patents and a NASA Silver Snoopy award (each Silver Snoopy pin flies on a space mission first), and she was named DesignCon's 2017 Engineer of the Year. We hope you enjoy “Just Ask Heidi.”

Q: What do you consider to be the biggest challenge for PCB design engineers today?

A: I would have to say impedance, and the fact that electrical signals with fast digital edges and low voltages are much more sensitive to this than ever before. Designers need to start thinking in terms of return paths and impedance to better understand how layout can have an adverse impact on PCB performance. The engineering trade-offs can be quite complex between performance, cost, and risk. Innovative solutions often benefit from the ability of EDA tools to do pre-layout “what-if” simulations using measurement-based models and manufacturing tolerances.

To submit your questions for Heidi, click here.