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PCB Talk: SAP—Changing the Way You Look at PCB Design

Which side of these competing aphorisms do you most relate to: “The only thing constant is change” or “The more things change, the more they stay the same.” I can build a case behind both when looking through the lens of someone working in the printed circuit board industry.

Electronics are rapidly evolving and challenging printed circuit board designers to add more functionality in smaller and smaller spaces. This pushes designers to search for and utilize new “tools” in their toolbox. Whether that is moving into the world of flexible circuits or rigid-flex, or jumping into technology created with semi-additive processes and suddenly being able to route with 50-micron line and space, 25-micron line and space or even finer, PCB designers are continually learning and adapting. Through that continuous change, designers are also expected to meet quality and reliability standards that have been a benchmark for decades.

One of the exciting changes and one of these new “tools” for printed circuit board designers and fabricators is the semi-additive PCB processes for printed circuit board fabrication. While these processes are not new to the electronics industry, they are new to the printed circuit board segment of the industry. These semi-additive processes gained recognition when the smartphone market started using these processing techniques to achieve 35-micron feature sizes in key PCB designs. There are a small handful of fabricators that cater to the high-volume consumer electronics market, yet until the past year or so, there have not been many options available for low-volume, high-mix work. 

This is changing rapidly. Subtractive etch processes are typically constrained at about 75-micron line and space. There are fabricators that will take a purchase order for 50-micron feature sizes, formed by subtractive etch processes, but this comes with a significant cost added, along with yield and reliability concerns. This has driven printed circuit board designers to increasingly rely on complex HDI structures to accomplish their routing. Stacked and staggered microvias and multiple lamination cycles are often required. These, too, come with yield and reliability concerns, not to mention increased cost.

The exciting news is that a handful of forward-thinking PCB fabricators have invested in semi-additive processing capabilities and now provide an option for those outside of the high-volume consumer electronics industry to take advantage of the benefits of routing with much smaller trace and space constraints. With any change, there is a learning curve to be expected and both fabricators and designers are navigating this now. Some embrace change and jump in with both feet. Others take a more cautious approach and wait to see how this develops.

From a fabrication standpoint, at a surface level, these semi-additive processes are a simple addition to the processes that they are currently using day in and day out. These processes move the constraint from the etching process to the photolithography process yet are still run with the existing laser direct-imaging equipment and all the same chemistries for electroless and electrolytic copper. Once the traces are formed, the circuit panel processes through fabrication in the same fashion as a subtractive etch layer would. 

As with any change to process, there is a learning curve and things that can catch you off guard. For example, again from the fabrication perspective, there are certain resists that resolve these finer feature sizes better than others and some process tweaks that need to be done to the photolithography process for the best results. And, with these finer feature sizes, the handling and cleanliness become more important. Arguably, while this can seem to be a challenge, once resolved, yield and reliability increase for all product, not only the SAP layers.

Switching perspective to the PCB designers’ adoption of features created with SAP processes, there is a similar learning curve. All the major design tools are able to accommodate these features sizes, with relatively little additional effort. At the same time, designers are working hard to understand the impacts. For some, simply reducing overall size, or reducing layer count is the critical element. For others, signal integrity is key. There is a continually growing body of knowledge around this design space. When you decrease line width, there is an impact on impedance and the best way to mitigate this or to use it to the best advantage is very design dependent.

There will be many tech sessions throughout the next several months that drill down into these considerations, looking both at the impacts at the board level and at the impact to the overall electronics design. One interesting case quickly showed the improvement in power consumption once the design was reviewed more holistically rather than just from the bare board perspective. 

As much as things change, they stay the same. As this effort is going on, industry associations such as IPC are working to establish guidelines for acceptance and reliability. Designers are requesting design guidelines, and as mentioned in a previous column, I am not necessarily in favor of that until we understand more about how to be apply the new capability. This is our opportunity to think outside of the box and collaborate on how to best reset the traditional technology curve. This is an exciting time for the PCB industry. Change is inevitable. Lean in and take advantage of these new capabilities.

This column originally appeared in the February 2022 issue of Design007 Magazine.