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Target Condition: Mandatory Masking Guidelines

I was recently asked to participate in a video interview to discuss the topic, “Who defines the solder mask clearance for a PCB design?”

Though I’m not certain if the interview will be published, it is a fair topic to cover here as there are a few designer opinions I’ve come across which could use a little masking themselves, as they appear to be uninformed and can come across as downright dictatorial. After spending a few years now as a captive PCB designer working within the walls of PCB fabrication and assembly, I am qualified to say that it takes exhaustive communication efforts to work with our manufacturing stakeholders when a design does not allow for a manufacturer’s unique manufacturing process capability.

Solder Mask
Printed board designs which move on to the component assembly phase include a coating of solder mask. It is often referred to as solder resist. Many know it as “the green coating,” though it can be procured in a variety of colors. This material serves a dual purpose. It provides a coating which seals the exposed outerlayer copper conductors, preventing them from becoming oxidized or contaminated. But the main purpose of solder mask material is—are you ready for this?—to mask solder. During the reflow phase, the solder melts and will flow away from the contacts if not masked.

How Much Clearance?
In all cases, unless allowed by design, solder mask material is not allowed to end up on solderable land surfaces because it blocks or masks the solder from coating the intended surface to be welded. For instance, if a solderable land surface on a PCB happens to receive a lost blob of solder mask which mistakenly finds itself on a land during processing, or is missed in inspection and continues to the assembly soldering process, the anomaly will corrupt the solder joint by reducing the surface area of the land. This is considered a nonconforming defect in the pages of the IPC-A-600 Acceptability of Printed Boards (Figure 2).

But there are other manufacturing conditions which can cause solder mask material to end up on solderable surfaces. Misalignment of the artwork, material movement, and expansion or shrinkage of the PCB over the entire span of its length are conditions which must be considered. These are conditions for which additional solder mask clearance is required. Therefore your design tool supplier has added a control feature in your design tool. But how do you set it? What values do you use?

For years, I have asked these questions of the students in the IPC CID classes I teach and I’ve heard some very interesting opinions. One will say, “I have had very good luck by setting my solder mask clearance to 6 mils (0.006").” Another will brag that his supplier is so good that clearance can be set at only 2 mils (0.002"). Still another argues that for consideration of “DFM,” everyone in their design group opens up the clearance to a whopping 10 mil (0.010") clearance.

The Goldilocks Zone
Again, per the widely accepted IPC acceptance criteria, no solder mask is allowed to end up on solderable lands as a manufacturing defect related to imaging, alignment, or sloppiness. So, with regard to DFM, a PCB designer might conclude that an overly robust clearance would be the best choice to help with PCB manufacturing as it makes the target zone hard to miss. But wait a minute here. As “the hub” of the PCB manufacturing process, a PCB designer must consider all the stakeholders’ requirements. While the PCB supplier might applaud this DFM consideration as something they’ll not have to worry about, the decision will most certainly affect the assembly stakeholders in a negative way. Let’s examine the Goldilocks zone for solder mask clearance.

The two-mil clearance example in Figure 4 challenges fabrication capability for some volume production suppliers. If the image misregisters even a little, the board fails acceptability due to solder mask material on lands.

If the solder mask clearance is too “robust,” as shown in Figure 5, the clearance will void masking between lands, possibly allowing solder at the assembly level to drift or “bridge” and short to neighboring lands. Notice that significant portions of the traces entering the land are not covered with solder mask. This condition allows solder to spread out away from the contact points of the land pattern and creates the notoriously problematic condition of inconsistent paste geometries.

Target condition for all classes: No solder mask misregistration. The solder mask is centered around the lands within the clearance space provided. Figure 6 shows solder mask coverage which tightly surrounds the lands and provides for optimal solder dams. But for many volume suppliers this tight manufacturing constraint capability cannot be met due to process or equipment limitations or advanced design topologies. In this case, should the PCB supplier’s CAM engineer be allowed to grow the clearance between the contact land and the solder mask opening to the point that it will not adversely affect solderability but allow for potential misregistration? Read on.

Avoiding DFM Confusion
By setting the solder mask clearance in your design to a certain value you are in effect dictating the design parameters for solder mask clearances unless you make some notational provisions. We’ve covered the case in which designers set their solder mask clearances based upon checking in with their own favorite fab shops. This may work for the design in the proto stages, but if the PCB designer cannot check in with the production supplier who will be building the PCB in production, what is the point? The point is that far too many designers do not understand that just because “their own” custom prototype shop can accurately mask with nearly zero increase or “swell” of the solder mask opening doesn’t mean that many volume-capable, offshore suppliers possess the capability. This fact is compounded by another fact that by the time the design goes to volume, the PCB designer’s favorite proto-shop is long removed from the EMS assembly stakeholder which will be ordering the boards from their own suppliers which most certainly will have entirely different manufacturing constraints.

When there is a lack of vision the people perish, says the proverb.   

So, who is “the hub” of the manufacturing process helping by interpreting DFM as “dictate for manufacturing” when they have absolutely no vision regarding the capabilities of the EMS provider’s supply chain?

Help the Supplier to Achieve the Target Condition
I really do like to think that our design data serves as the hub of the manufacturing process. In my mind the data and fabrication specification criteria must be output with all the PCB industry stakeholders in consideration so that it provides a viable starting point for all to be successful in hitting the design, procurement, manufacturing, test, and inspection targets of the whole team project stakeholders. How can a PCB designer “design” solder mask clearance without knowing the manufacturing constraints of unknown suppliers?

The key to this dilemma is found within a simple twist of context which is occurring within our industry.

With the continuous developments in the creation and utilization of intelligent design and manufacturing data, smart factories leveraging IPC CFX standards will have more and more access to our data to make corrections without the PCB designer—who may be blind to the process—being involved. This advanced paradigm sets the stage for our whole PCB industry of product stakeholders to design, manufacture, and collaborate with each other simultaneously with access to standardized, accessible data.

I suggest setting the solder mask clearance values in a design layout to “zero” and allow the PCB supplier to swell the openings to the minimum value which their overall manufacturing capabilities can achieve acceptability. Coupled with a simple fabrication note which will allow the supplier’s CAM group of manufacturing engineers to make clearance and sliver adjustments, your EMS supplier will no longer have to field engineering queries regarding these issues. This philosophy will transfer the responsibility to the stakeholders who are the most qualified, and most in touch with the manufacturing processes and capabilities, to vary the solder mask clearance values throughout the design as required. By doing so, they will manufacture with design to set the design data up for success.

 This column originally appeared in the April 2022 issue of Design007 Magazine.