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Floor planning decisions can make or break performance, manufacturability, and timelines. This month’s contributors weigh in with their best practices for proper floor planning and specific strategies to get it right.
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Estimated reading time: 2 minutes

The Shaughnessy Report: A Plan for Floor Planning
Most of the time, we cover topics that designers say are giving them trouble. But designers don’t usually cite floor planning as one of their bigger challenges. No, it’s the fabricators who say that floor planning is an ongoing problem for their designer brethren, usually after having to put yet another job on hold.
Floor planning is the time to be proactive. As some of our contributors point out in this issue, floor planning is like laying out the buildings in a city or setting up furniture in a new home. But it’s not just a matter of making everything fit in the appropriate form factor.
There are dozens—sometimes, hundreds—of tradeoffs to be addressed while balancing electrical performance with physical and cost constraints. Decisions made during floor planning can impact performance, manufacturability, and project timelines. Stackup choices can haunt you far downstream. Component placement can impact signal integrity, and lead to even more tradeoffs that compromise routing efficiency.
The likelihood of error rises as the pitch shrinks. According to some estimates, 30% of HDI failures can be traced to poor placement decisions. Increasingly tinier BGA pitches can make zoning a nightmare while upping the risk of crosstalk, and grouping ICs with thermal problems can create hotspots that affect reliability.
There are so many ways to go wrong during floor planning. But don’t worry, this month’s contributors weigh in with their best practices for proper floor planning and some specific strategies to help you avoid that dreaded call from the fabricator at 5:30 on a Friday night.
We start with an article by Cory Grunwald and Jeff Reinhold, who share several ideas for optimizing your floor planning process. Tamara Jovanovic explains how to craft your floor planning strategies to meet the challenges of your company’s product requirements. Barry Olney discusses how to set up proper floor planning for the best signal integrity outcome. John Watson points out some lessons that PCB designers can learn from mistakes made by interior designers. Stephen V. Chavez compares floor planning to designing an entire city from scratch, and Kelly Dack discusses why floor planning is much like moving furniture. We also have columns by Matt Stevenson and Happy Holden, and articles by Gerry Partida, Anaya Vardya, and Shawn DuBravac.
It’s almost trade show season, and we’ll be covering PCB West and SMTA International in the upcoming months. See you next time.
This column originally appeared in the August 2025 issue of Design007 Magazine.
More Columns from The Shaughnessy Report
The Shaughnessy Report: Showing Some ConstraintThe Shaughnessy Report: Planning Your Best Route
The Shaughnessy Report: Solving the Data Package Puzzle
The Shaughnessy Report: Always With the Negative Waves
The Shaughnessy Report: Breaking Down the Language Barrier
The Shaughnessy Report: Back to the Future
The Shaughnessy Report: The Designer of Tomorrow
The Shaughnessy Report: A Stack of Advanced Packaging Info