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NVIDIA Architecture Drives Optical Interconnects; CPO in AI Data Centers Rising

03/11/2026 | TrendForce
NVIDIA’s next-generation AI compute rack architecture indicates that future GPU designs will increasingly prioritize higher chip-to-chip interconnect density and faster data transmission, according to TrendForce’s latest research on the high-speed interconnect market.

Powering the Future: How Packaging Choices Make or Break Performance

03/11/2026 | Brian Buyea -- Column: Powering the Future
When we talk about reliability in electronics, we often focus on the system level: redundancy, fail-safes, or software resilience. But long before the system is assembled or even tested, reliability is considered in materials, metallization, and the packaging process itself. If the foundation isn’t built to survive the environment, no amount of clever design downstream will make up for it.

NCAB Group White Papers: Practical PCB Design Guidance for Manufacturable Results

02/25/2026 | I-Connect007 Editorial Team
The I-Connect007 Industry Resource Center brings together expert white papers that help engineers and manufacturers navigate today’s design and manufacturing challenges across the PCB lifecycle. NCAB Group contributes a valuable collection of white papers focused on practical PCB design and manufacturability. Drawing on their experience with a global network of production partners, NCAB helps engineers align design intent with fabrication realities: reducing risk while improving consistency and long-term reliability.

Connect the Dots: Designing for the Future of Manufacturing Reality—Strip-Etch-Strip

02/19/2026 | Matt Stevenson -- Column: Connect the Dots
The demand for ultra-high density interconnect (UHDI) PCBs is growing as electronic devices become increasingly advanced. That means we will be creating more designs that need to align with the reality of manufacturing UHDI boards. My last column on this subject focused on plating, and we are ready to discuss the strip-etch-strip (SES) process. With UHDI boards, footprints are smaller and tolerances are tighter. Your big design challenge associated with the SES process involves trace width and spacing control. The etching process can undercut traces and alter their final size.

Powering the Future: From Thick-Film to DBC—Understanding the Evolution of Ceramic Packaging

02/11/2026 | Brian Buyea -- Column: Powering the Future
Ceramic packaging has quietly powered the electronics revolution for more than half a century. From the earliest thick-film hybrids to today’s direct bond copper (DBC) substrates and metallized aluminum nitride, every step forward in ceramic technology has pushed the limits of reliability, power density, and performance. It’s essential for every design engineer building the next generation of electronic systems to understand this evolution.
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