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The Shaughnessy Report: Exploring High-reliability Fabrication
As you can see by our space-age cover, reliability can make the difference between life and death. While your next board may not be as mission-critical as an astronaut’s lifeline, you certainly don't want your board to fail in the field, ever.
But the road to high-reliability fabrication success is often marked with potholes, and the U.S. seems to be hitting all of them. Why is Asia so far ahead of the U.S. in high reliability, UHDI, and additive processes?
High-rel fabrication presents several challenges and tradeoffs for fabricators, along with myriad market opportunities. There’s never been a better time for U.S. fabricators to start manufacturing ultra HDI PCBs—if they have the know-how and resources to do it the right way.
With this issue, we set out to answer a variety of questions about high-rel fab. Where does high-rel begin—what’s the actual cutoff? How much investment does it take for a “typical” board shop to move into the high-rel realm? What are the biggest causes of high-rel failures? How do you measure reliability failure? After four years of research, why can’t the North American fab industry figure out the root cause of microvia failures? Staggering microvias is just a workaround, and many times your board may require stacked vias. Why do Asian shops seem to have stacked microvia processes dialed in?
In this month’s issue, our expert contributors have the answers. We discuss the latest in technologies, trends, complexities, and resources regarding high-reliability fabrication. We also detail the tradeoffs involved in maximizing reliability while reducing your costs, and introduce you to experts and resources that can help you raise your reliability levels.
We start with a conversation with Alex Stepinski, who offers an overview of high-rel fab and the bottlenecks that tend to trip up manufacturers. Columnist Preeya Kuray discusses the material science behind thermal reliability. Alex also contributed an article in which he discusses the need for fabs to pay more attention to copper grain structures. I’ve also included an excerpt from Reza Ghaffarian’s chapter on reliability published in the Printed Circuits Handbook.
There’s a piece from Tim Estes and Nick Meeker on failure and reliability trends, and a conversation with Marc L’Hoste, who explains why high-rel processes demand solid pre-planning, DFM, and inspection. We also have an article by Val Kaplan, and columns from contributors Happy Holden, Hannah Nelson, and Travis Kelly.
See you next month!
This column originally appears in the October 2023 issue of PCB007 Magazine.
More Columns from The Shaughnessy Report
The Shaughnessy Report: Zee Plane! Zee Plane!The Shaughnessy Report: Watt About Power Integrity?
The Shaughnessy Report: Winning the Signal Integrity Battle
The Shaughnessy Report: A Plan for Floor Planning
The Shaughnessy Report: Showing Some Constraint
The Shaughnessy Report: Planning Your Best Route
The Shaughnessy Report: Solving the Data Package Puzzle
The Shaughnessy Report: Always With the Negative Waves