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Talking Digital Twin and DFT With Aster
January 25, 2024 | Barry Matties, I-Connect007Estimated reading time: 2 minutes

Digital twin is a buzzword, but it’s really just a way to define what everyone has already been aiming for, says Dean Poplett, technical director at Aster Technologies. But how much does a test company need to put into digital twin? Is it all the equipment or just what needs to be tested? Dean lays out the scenarios Aster manages and how they work with companies to help them achieve their goals.
Barry Matties: What is today’s greatest challenge in testing?
Dean Poplett: It’s trying to find a new test strategy that helps with the board complexity and the size of the board. For example, you have boundary scan, which is limited by the components that are boundary scannable and limited by the design; ICT, where most of the boards are very limited in size, and we don’t have room for test points; and AOI, which is difficult because it's an optical system and tests can be quite subjective. You need to be an expert to understand whether it’s doing a good test on that component. It's not definitive.
With our TestWay software, we amalgamate the coverage from each machine and test strategy into an overall coverage. But the limitation is that there are some components we can't test. It would be nice to find the next strategy that takes us further.
Matties: Digital twin is a term we often hear in the industry. What’s your take on it?
Poplett: Digital twin allows a machine in the real world to predict what a machine will do to the design we have on the table in front of us. If we have it with the entire line, then we can make all the predictions for the real-world scenario before we get there.
Matties: Part of the issue, though, is every piece of equipment needs to be digitally benchmarked for performance characteristics and all the data must be ready for a true digital twin, a true manufacturing environment.
Poplett: Right. Test is slightly easier than assembly, where you have analog-type problems like heat transfer, and tombstoning is caused because of the disproportionate amount of heat and cooling of parts in question. When we are testing, it's reasonably straightforward, and we can predict exactly what a particular option on a machine can achieve. With the circuit and the parallel components around the component we want to test, we know exactly what it will do. With proper circuit analysis, we can predict exactly what a machine can achieve. Obviously, with any analysis, we can predict that, but we might get it wrong one time. Because we have a closed-loop system, our prediction is compared against the actual real cover measurement. Any discrepancy is either because the debug engineer has not done a particularly good job, or our estimator isn't so good. Whenever we get a discrepancy, we can look at the report and say, “Here's your problem, sort it out,” or, “It's our problem we will sort it out.”
This article continues in the January 2024 issue of Design007 Magazine.
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