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This month, our expert contributors discuss the impact of advanced packaging on stackup design—from SI and DFM challenges through the variety of material tradeoffs that designers must contend with in HDI and UHDI.
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This month, we delve into rules of thumb—which ones work, which ones should be avoided. Rules of thumb are everywhere, but there may be hundreds of rules of thumb for PCB design. How do we separate the wheat from the chaff, so to speak?
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Our expert contributors provide a complete, detailed view of partial HDI this month. Most experienced PCB designers can start using this approach right away, but you need to know these tips, tricks and techniques first.
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IPC Design Competition Champion Crowned at IPC APEX EXPO 2024
April 24, 2024 | IPCEstimated reading time: 1 minute
At IPC APEX EXPO 2024 in Anaheim, California, five competitors squared off to determine who was the best of the best at PCB design.
As finalists in the third annual IPC Design Competition, the five designers were invited to IPC APEX EXPO to compete in a five-hour layout challenge, to place components and route a board, compliant to relevant IPC standards. As part of the finals heat, competitors used Altium Designer, and a project was provided with stackup and board geometry complete, with certain critical components pre-placed. All other components were left to be placed at the discretion of the competitors.
At the end of the round, each competitor delivered their project file to judges Kris Moyer and Patrick Crawford, IPC; Steve Roy, Roy Design and Manufacturing Service; Russell Steiner, Amphenol; Kevin Kusiak and David Caputa, Lockheed Martin. The judges placed weight on examining completeness of the board (i.e., how many routed nets) vs. critical errors – namely short circuits, clearance violations, via producibility, and various signal integrity aspects.
After an intense 2.5-hour judging process, Dinesh G., lead turnkey, Sienna ECAD, took first place with his PCB design.
Second place went to Paul Brionez, CID+, senior PCB design layout engineer, Wisk Aero. Third place went to Ajeesh Francis, senior PCB engineer, Tessolve Semiconductor Pvt. Ltd.
Runners-up included: Joseph Chiu, ToyBuilder Labs and Harish G., senior engineer, R&D-Mobility, Exicom Tele-Systems Ltd.
To learn more about IPC’s design initiative, visit ipc.org/solutions/ipc-design.
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Effects of Advanced Packaging and Stackup Design
12/26/2024 | I-Connect007 Editorial TeamKris Moyer teaches several PCB design classes for IPC and Sacramento State, including advanced PCB design. His advanced design classes take on some really interesting topics, including the impact of a designer’s choice of advanced packaging upon the design of the layer stackup. Kris shares his thoughts on the relationship between packaging and stackup, what PCB designers need to know, and why he believes, “The rules we used to live by are no longer valid.”
Beyond Design: AI-driven Inverse Stackup Optimization
12/26/2024 | Barry Olney -- Column: Beyond DesignArtificial intelligence (AI) is transforming how we conceptualize and design everything from satellites to PCBs. Traditionally, stackup planning is a manual process that can be multifaceted and relies heavily on the designer's expertise. Despite having best practices and various field solvers to optimize parameters, stackup planning remains challenging for complex designs with advanced packaging, several layers, multiple power pours, and controlled impedance requirements.