Day 2: A Full Day at the EIPC Summer Conference

Estimated reading time: 7 minutes

Editor's note: This is the third and final report from the EIPC Summer Conference.

It was a bright and early start to the second day of the 2024 EIPC Summer Conference at the European Space Centre, Noordwijk, The Netherlands, June 4-5. A short journey by bus from the hotel in Leiden and our security passes from the day before got us through the gate and to our seats in the Newton Room for Session 4, “Material Studies,” moderated by Martyn Gaudion.

The first presentation was given by Mandy Krott of Robert Bosch, describing the qualitative analysis of crack formation in thermally aged glass fibre-reinforced polymer printed circuit boards. The introduction of autonomous driving systems and powertrain electrification has resulted in a change in the stress and longevity requirements for automotive electronics: high-temperature conditions have led to an increase of crack formation and miniaturisation has increased the risk of electrochemical migration. 

Studies of the oxidation of base material have observed that during aging, oxygen diffusion into PCBs can cause oxidation, leading to discolouration of the material. The oxidation depth is limited because copper acts as oxygen diffusion barrier. Oxidation propagation is not uniform because of the glass fabric, and the packing of glass fibres influences the degree of oxidation, with large variations in measured values of oxidation depth. The diffusion coefficient of glass fabric is different to that of pure polymer, which shows only narrow scattering of measured data.

Krott commented that the kinetics of aging are not linear: oxidation is a diffusion-controlled process and follows Fick’s second law. She observed that crack length is an approximately linear function of aging time, although with a high level of scattering. Because the increase in crack length and oxidation thickness depends on aging time, a correlation between them can be assumed.

Studies of the oxidation of base material by Fourier-transform infrared spectroscopy show no additional bands appearing, and no existing bands disappearing indicating only a small change in material composition. A dye penetration test is useful for crack identification and can differentiate between continuous and interrupted cracks. Optical and SEM microscopy confirm that defects manifest exactly at the interface between fibres and polymer, and thermal degradation primarily affects the interface. Analysis of focused ion beam cross-sections demonstrated the crack between glass and polymer, indicating de-bonding along the surface and giving a good understanding of the crack’s three-dimensional path.

Krott suggested a damage mechanism with oxidation as a critical factor in the formation of cracks, with accelerated oxygen diffusion, leading to chain-reactions between oxygen and polymer, leading to oxidation and changes of material properties. Polymer shrinkage occurs due to thermo-oxidative ageing, and shrinkage initiates crack formation at interface.

An extremely detailed presentation, “Sustainability through innovation: Exploring printed electronics for next-gen devices,” was delivered by Dr. Karem Lozano Monte, a postdoctoral research fellow at Tampere University in Finland. 

She listed some of the desirable attributes of next-generation electronic devices: flexibility and miniaturisation, energy efficiency and sustainability, rapid prototyping and development, connectivity and customisation, durability and robustness, and low-cost production. 

Many of these aims can be realised with flexible hybrid electronics, which combine flexible and rigid components and are applicable in healthcare, consumer electronics and wearables. They can be produced cost-effectively through printing techniques and used eco-friendly, biodegradable materials. A wide range of printing technologies can be used. She listed inkjet printing, aerosol jet printing, 3D printing, screen printing, gravure printing, flexographic printing, offset printing, and doctor-blade coating. These are compatible with flexible substrates, and are cost-effective and environmentally friendly.

A significant benefit of printed electronics manufacture is it’s a fully additive process, and avoids many of the process steps involved in traditional subtractive manufacture, as well as being cost-effective and scalable. Other benefits include design flexibility, with customisable, flexible, and adaptable designs; environmentally sustainable, with reduced waste and the use of eco-friendly materials; and energy efficient, including the easy integration of energy-harvesting technologies. Added to these is the ability to prototype rapidly, enabling quick development cycles and accelerated innovation.

A good application example is in healthcare, with self-powered wearable sensors. Batteries can be eliminated by energy harvesting, and ample biomechanical energy is available.

Monte discussed some outcomes of her research work: self-powered ultrathin pressure sensors, fully printed piezoelectric pressure sensors, ultrathin and transparent pressure sensors for biosignal monitoring, a skin-conformable piezoelectric energy harvesting module, a fully printed piezoelectric nanogenerator, and a triboelectric energy harvester.

She concluded that flexible hybrid electronics are revolutionising healthcare, consumer electronics, and wearable technologies, that eco-friendly materials and reduced manufacturing waste contribute to environmental sustainability, innovations in material engineering are improving flexibility, durability, and performance of these devices and that continuous advancements and increasing adoption promise a bright future, although research, investment, and collaboration is essential to drive further innovation.

Emma Hudson moderated Session 5 on the electrical performance of PCB materials, and Marco Cereda from ITEQ distributor COM.INT.EL in Italy described newly developed methodologies to boost the electrical performance of copper clad laminate.   

He demonstrated the benefits of higher resin content and low-dielectric-constant glass on insertion loss. For example, using E-glass, a change in resin content from 55% to 68% enhanced insertion loss by 5%. 

He compared the characteristics of standard oxide treatments with new-generation bonding treatments and illustrated the reduction in surface roughness between a traditional intergranular etch and a nano-etch with organo-silane and the corresponding effect on signal integrity. Measured values indicate that loss performance has improved by 5-10% at 16GHz and by 11-14% at 28GHz by using a low-etching oxide treatment. 

Cereda reported that ITEQ is working closely with foil suppliers to reduce the skin effect of copper foil to further reduce the roughness in the copper surface from 2 microns to 0.8 microns to provide better signal integrity in antenna feed-lines and digital signal lines. 

The material attributes he recommended as a solution for future advanced HDI boards are high resin content, reverse-treated foil, and new-generation bonding treatment, a combination of which would ensure great performance with cost efficiency and easier-to-secure supply. 

The latest update on the correlation between copper foil surface conductivity and roughness, studied in the European funded “5G Foil” project, was presented by Thomas Devahif of Circuit Foil in Luxembourg. 

Resonators have been used to characterise copper foil conductivity at high frequency, the sapphire dielectric resonator for frequencies up to 21GHz, and the Fabry-Perot open resonator for frequencies up to 50GHz.Direct measurement on the copper enables quicker foil characterisation and avoids any interferences related to PCB manufacturing. 

The parameter most meaningfully describing surface roughness has been found to be the Sdr value, defined as [(actual surface area divided by projected surface area) -1] x 100, expressed as a percentage. There is much better correlation between surface conductivity and Sdr than with Sa (the difference in height of each point with the arithmetical mean of the surface, expressed in microns), or other parameters such as Sz, Sq or Rz. 

Devahif showed a graph of surface conductivity against Sdr at 21Ghz, which was an almost smooth curve, with an R² value of 0.94, whereas the equivalent graph of conductivity against Sa was severely scattered. He explained that Sa does not account well for micro roughness, unlike Sdr, and he illustrated this with a series of SEM photographs. It has been noticed, however, that HVLP copper foils deviated from the trend, the reason being that roughness profiles and nodule sizes less than skin depth have negligible impact on signal losses.

Using finite element modelling based on atomic force microscopy, he simulated the influence of roughness and copper conductivity on insertion losses. The difference between measured and calculated surface conductivity on HLVP was attributed to surface model approximations related to the less dendritic surface. Numerical simulations of the influence of nodular treatment showed trends well-aligned with actual measurement results. 

Devahif listed the programme of future work for the project, which includes improvement of finite element model accuracy, investigation of copper properties at higher frequency, effect of passivation on surface conductivity, and optimisation of surface profile to achieve the best compromise between signal loss and adhesion.

The final technical session explored how design capabilities can be improved by software standardisation, moderated by Tarja Rapala-Virtanen.

Richard Prent, director of Novatrace in the Netherlands, discussed PCB design using IPC-2221 and IPC-2222, explaining that his company uses the IPC 22xx series as a starting point for all their PCB designs and construct all its footprints in conformance with IPC-7351, because IPC standards are accepted worldwide by PCB factories and assembly companies.

He reviewed IPC terminology and how it defines performance classes, producibility levels, density levels, and fabrication allowances. Performance class relates to the durability and environmental impact of the end product, producibility level relates to the manufacturing process and communicates the degree of producibility, with fabrication allowance defining the process window for features and tolerances, and density level referring to the geometries of footprints and pads. 

He commented that all terms and qualifications can be combined: For example, Class 3 with Producibility level B and Density level A, although they might conflict on terms of reliability and cost price, and he recommended involving the manufacturer to choose the best qualification.

With reference to the IPC Standards Tree, he compared the merits of top-down or bottom-up approaches, preferring the latter because the first question was always “What class?” 

Regarding acceptance criteria, he referred to IPC-A-610 and examined the terms “Target Condition,” “Acceptable,” and “Nonconforming,” with examples for illustration. 

Similarly, IPC-A-610 criteria acceptance criteria are “Target Condition,” “Process Indicator,” “Acceptable,” and “Defect.” 

He asked, “But what if acceptance criteria, are not acceptable?” He explained that it was possible to deviate from the criteria by a master drawing or additional purchasing conditions making a clear agreement between the parties on which criteria should be deviated from the standard. “As Agreed Between User & Supplier.” 

What is AFNOR Spec 2212: Printed Boards-Routing Parameters? Christian Maudet, the ECAD workbench expert from Thales in France, spoke on behalf of a working group of companies within the French standards organisation AFNOR, Association Française de Normalisation, the member body for France in ISO, the International Organisation for Standardisation. 

The working group included Thales, MBDA France, Safran Electronics & Defense, AFNOR, Cimulec Groupe, Group ACB, Aster Technologies, ID3 Technologies, Groupe SEB, and Actia Automotive

Maudet stressed that AFNOR Spec 2212 is not a competitor to IPC 2221, which is widely recognised as a reference by engineers and designers and provides guidelines for designing PCBs. The AFNOR Spec 2212 takes a fully parametric approach to PCB design rules, and Maudet advocated implementing PCB parameters right from the start of the design phase. 

It is the intention of the working group to reactivate the standards committee AFNOR/UF 91 for design, manufacturing, and testing techniques for electronic boards, and to initiate a standardisation process with the objective of incorporating AFNOR Spec 2212 into the enterprise standards and promote AFNOR Spec 2212 to an IEC standard through UF 91/TC91. Discussions with the major CAD and CAE vendors are ongoing to integrate AFNOR Spec 2212 into their tools.

The 27-page AFNOR Spec 2212 is available for free download in French or English. 

The conference ended with a “Quick-Fire Walk-In” session: a panel consisting of Maarten Cauwe, Emma Hudson, and Martyn Gaudion being quizzed by Alun Morgan with some searching questions and some very interesting responses. It was the second occasion on which such a session had been included in the conference programme, and it will probably become a regular feature. 

In his closing remarks, Morgan praised the exceptional standard of the presentations and thanked the speakers, the sponsors, and all who attended. Particular thanks went to Tarja Rapala-Virtanen for organising the conference programme, to Kirsten Smit-Westenberg  and Carol Pelzers for their superbly professional event management, and especially to Stan Heltzel for hosting such a memorable occasion.

Grateful thanks to Alun Morgan for the superb photographs.