-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueShowing Some Constraint
A strong design constraint strategy carefully balances a wide range of electrical and manufacturing trade-offs. This month, we explore the key requirements, common challenges, and best practices behind building an effective constraint strategy.
All About That Route
Most designers favor manual routing, but today's interactive autorouters may be changing designers' minds by allowing users more direct control. In this issue, our expert contributors discuss a variety of manual and autorouting strategies.
Creating the Ideal Data Package
Why is it so difficult to create the ideal data package? Many of these simple errors can be alleviated by paying attention to detail—and knowing what issues to look out for. So, this month, our experts weigh in on the best practices for creating the ideal design data package for your design.
- Articles
- Columns
- Links
- Media kit
||| MENU - design007 Magazine
Siemens Debuts Fast, Accurate and Context-aware Electrostatic Discharge Verification Solution Spanning all Phases of IC Design
June 26, 2024 | SiemensEstimated reading time: 2 minutes

Siemens Digital Industries Software announced today a fully automated solution to help integrated circuit (IC) design teams rapidly identify and address Electrostatic Discharge (ESD) issues driven by the growing complexity of today’s next-generation IC designs, regardless of targeted process technology. Combining the power of Siemens’ Calibre® PERC™ software with the proven SPICE accuracy of its AI-powered Solido™ Simulation Suite, it provides a fast and highly accurate method for checking compliance against foundry rules spanning all phases of IC design.
Supporting full-chip level verification, the solution helps engineering teams better manage design and manufacturing challenges in both established and emerging process nodes. Its context-aware checks can help to improve the accuracy of results, while reducing turnaround time for physical, circuit, electrical and reliability IC design verification.
The solution’s context-aware checking allows design teams to verify ESD paths quickly, in time to secure waivers from foundry rules that can lead to smaller die sizes and optimized designs – ultimately helping design teams quickly arrive at data driven decisions 8x faster than current methods.
Foundry ESD rules are designed to prevent ESD failures, while accommodating the diverse design styles submitted by fabless companies globally. However, these rules may be overly conservative for specific design styles and mission profiles. By rapidly identifying and simulating ESD paths that might fail foundry rules with detailed transistor-level breakdown models, this Siemens’ new software identifies at-risk paths with SPICE-level precision, allowing for fast, targeted and automated fixes.
“Siemens’ new context-aware ESD simulation solution can help deliver accurate reliability assessment for complex IC designs,” said Silicon Labs’ Michael Khazhinsky, Principal ESD Engineer of Central R&D. “The push-button solution integrates dynamic simulation results from Solido into a full-chip Calibre PERC result that can be used to quickly determine if designs are electrically robust. In the event of circuit errors, this Siemens solution identifies nets and devices that need to be improved.”
Automated context-aware IC design verification can now become a best practice, helping the quick delivery of reliable and timely IC chips to market. Featuring functionalities such as automated voltage propagation, voltage-aware design rule checking, and the integration of physical and electrical information within a logic-driven layout framework, it helps design teams working to tight schedules.
"By leveraging automated context-aware checking, Siemens is empowering design teams to address more quickly the complexities of modern IC design reliability verification," said Michael Buehler-Garcia, vice president of Calibre Product Management at Siemens Digital Industries Software." This integration combines the strengths of our dynamic simulation from Solido and sign-off level ESD verification in Calibre PERC. Our integrated solution speeds up the verification process while at the same time ensuring the reliability of IC designs, helping our customers achieve their goals more efficiently. This is the first in a series of solutions that Siemens plans to provide that leverage offerings from different elements of our software portfolio to speed overall design cycle time."
Suggested Items
Digital Twin Concept in Copper Electroplating Process Performance
07/11/2025 | Aga Franczak, Robrecht Belis, Elsyca N.V.PCB manufacturing involves transforming a design into a physical board while meeting specific requirements. Understanding these design specifications is crucial, as they directly impact the PCB's fabrication process, performance, and yield rate. One key design specification is copper thieving—the addition of “dummy” pads across the surface that are plated along with the features designed on the outer layers. The purpose of the process is to provide a uniform distribution of copper across the outer layers to make the plating current density and plating in the holes more uniform.
Meet the Author Podcast: Martyn Gaudion Unpacks the Secrets of High-Speed PCB Design
07/10/2025 | I-Connect007In this special Meet the Author episode of the On the Line with… podcast, Nolan Johnson sits down with Martyn Gaudion, signal integrity expert, managing director of Polar Instruments, and three-time author in I-Connect007’s popular The Printed Circuit Designer’s Guide to... series.
Showing Some Constraint: Design007 Magazine July 2025
07/10/2025 | I-Connect007 Editorial TeamA robust design constraint strategy balances dozens of electrical and manufacturing trade-offs. This month, we focus on design constraints—the requirements, challenges, and best practices for setting up the right constraint strategy.
Elementary, Mr. Watson: Rein in Your Design Constraints
07/10/2025 | John Watson -- Column: Elementary, Mr. WatsonI remember the long hours spent at the light table, carefully laying down black tape to shape each trace, cutting and aligning pads with surgical precision on sheets of Mylar. I often went home with nicks on my fingers from the X-Acto knives and bits of tape all over me. It was as much an art form as it was an engineering task—tactile and methodical, requiring the patience of a sculptor. A lot has changed in PCB design over the years.
TTCI Joins Printed Circuit Engineering Association to Strengthen Design-to-Test Collaboration and Workforce Development
07/09/2025 | The Test Connection Inc.The Test Connection Inc. (TTCI), a leading provider of electronic test and manufacturing solutions, is proud to announce its membership in the Printed Circuit Engineering Association (PCEA), further expanding the company’s efforts to support cross-functional collaboration, industry standards, and technical education in the printed circuit design and manufacturing community.