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Indium Technical Expert to Present at SiP Conference China
November 25, 2024 | Indium CorporationEstimated reading time: 1 minute
Indium Corporation Senior Area Technical Manager for East China Leo Hu is scheduled to deliver a presentation on Low-Temperature Solder Material in Semiconductor Packaging Applications at SiP China Conference 2024 on November 27 in Suzhou, China.
The presentation, titled Low-Temperature Material Discovery and Readiness for First-Level Interconnect in Semiconductor Packaging, will explore the latest advancements in low-temperature alloys designed for solder bump or Cu pillar first-level interconnects.
In recent years, more low-temperature alloys and materials—operating below the standard SAC305 processing temperature—have been introduced in printed circuit board assembly. Reducing warpages and energy consumption and creating a processing temperature hierarchy for multiple assembly processes are some of the key drivers for the shift to the use of low-temperature material. There has been a rapid increase in the use of similar alloys or material for first-level interconnect in semiconductor packaging, mainly in the form of solder bump or Cu pillar interconnect.
“In this presentation, we will discuss current available alloys or material that can be suitable candidates for first-level interconnect. We also conducted a survey to understand the challenges, readiness, and need of the industry for using low-temperature material focusing on first-level interconnect,” said Hu. “I’m excited to share our collective expertise with my colleagues as we explore homogeneous or partial mixing of low-temperature solder or mid-temperature solder with current standard Pb-free alloy, which can be critical to the thermal fatigue behavior and reliability of the interconnect.”
As Senior Area Technical Manager for East China, Hu manages the technical support team in East China and collaborates with global technical support teams to provide Indium Corporation customers with product and application solutions. He has more than 19 years of experience in semiconductor packaging and possesses expertise in advanced assembly technology development, process improvement, and assembly materials applications. Hu earned a master’s degree in IC engineering from the Chinese Academy of Science and a bachelor’s degree in electronic information science and technology from Nankai University, Tianjin, China.
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