Managing Energy Flow with Proper Stackup Design 

Estimated reading time: 7 minutes

At Design Con 2025, I had the opportunity to speak with Dan Beeker, technical director at NXP Semiconductor, about his technical session, which focused on optimizing PCB layers to best direct signal and power supply energy between these layers.

In this interview, Dan discusses the complexities of board stackup and the significance of understanding dielectric layers for effective signal transmission. Dan is something of a “fields evangelist,” spreading the word about the need for designers to focus on fields, not just circuit theory. Toward the end, Dan summed up much of the design segment: Designing something that didn't make it break is not the same thing as designing it correctly. 

Andy Shaughnessy: Dan, tell us about the class you presented this morning. 

Dan Beeker: Yes, I had a 45-minute technical session titled “Stacking the Deck: Maximizing the PCB Layer Design for Signal Integrity & EMC Performance.” I was focusing on what's important when you're looking at your board stackup for signal transmission. It was a bit of a challenge to get all of this into 45 minutes and still get some of the underlying physics that people could understand. 

Shaughnessy: How was the turnout?

Beeker: there were close to 100 attendees with standing room only. The response was very positive. I played my song, “All About the Space,” four or five times before we started this class. People were enjoying that. I asked how many attendees were board designers, and it was only about 5%. Then I asked the hard question, “Who has had first-time compliance?” Only one person raised his hand. We discussed the status quo, which is that you expect to fail EMC three to five times. When you do the respins, there's very little confidence in success.

Shaughnessy: What were the high points of the class?

Beeker: The real focus was getting people to understand the importance of knowing the dielectric that their signals start from and the dielectric they wanted to them to end up in. They also need to grasp the idea of making sure that path was an intact transmission line with continuous ground, a continuous dielectric, when you need to use a ground transition via, and when you don't have to. If a layer is not adjacent to a ground plane—I call those orphan layers—they have to be routed as if they were single-layer boards. So, you use coplanar ground traces or ground flood in order to create that single-layer dielectric-based transmission line. But to get to the orphan layer, you need both the signal via to connect the signal conductor and a ground transition via next to that signal via to connect the horizontal copper on the orphan layer to convert from a vertical dielectric into that coplanar dielectric. 

This was a foreign idea to many of them. We went through my favorite board stacks. I like to have even multiples of three. My favorite board stack is a six-layer board with two ground planes, and then after that it's 12, 18, etc. We went from two- to 12-layer boards and I explained my approach for designing them. A two-layer board is two orphan layers, so you route them as if they were single-layer boards. Then you make the interconnect between the two layers with a pair of vias.

Then, with a four-layer stack, which is a very popular board stack in many products, you would use one layer as a ground plane. One and three adjacent to two are automatically good transmission lines under the connection via between one and three. The dielectrics are automatically connected by the hole around the via. So, you don't need a ground via, but when you go from one or three to four, then four is the orphan layer, and you have to use both a signal and a ground transition via to connect those upper layers to four. That discussion went pretty well. I had some crude drawings to show the flow of energy from layer to layer in those cases. We looked at a four-layer board, two-layer board, and a six-layer board, which again is my favorite because one and three are automatically paired, and four and six are automatically paired. When you move from the upper domain to the lower domain, you need a ground via. So, one or three to four or six need a ground via.

I did an eight-layer board. Most people want to do an eight-layer board with two ground planes, so they end up with two orphan layers. My example had three ground planes, so that I had the two sets of triplets of the two paired dielectrics on the outside of the board. On the inside, I had a ground plane next to a signal layer, and those formed a good transmission line. But when you go from the outer domains, the one to three or the six to eight, you need to have a ground transition via to connect to the dielectric between four and five. Then you go into the 10-layer board. My example had three ground planes where you have three bare dielectric domains, and then you have the other single dielectric domain that has to be connected with the ground transition vias. 

We talked about the need to manage impedance, and making sure that you know the switching speed of the driver. You need to know how to treat that if it's switching fast enough that the distance between the driver and the load is greater than a quarter wavelength. You need to do controlled impedance, and that tells you what to do with the power supply. That's where the capacitor needs to be. If it's not in the data sheet, it's your responsibility to find that out.

Shaughnessy: Did you get any good questions?

Beeker: There were some great questions. There were some students, and also a number of senior engineers who asked questions about their board stacks. I think I had a very positive impact on the audience. The questions showed me that they were starting to think in the right way. They were starting to think about the fields and the spaces. Nobody knew who Ralph Morrison was, so I gave then an introduction to Ralph’s work with fields. I told them to check his website out and get a feel for his contribution.

Shaughnessy: What's the biggest mistake designers make when doing stackups? 

Beeker: It's following the app notes, unfortunately. It's the idea that you can use power as a return, or that you can use a ground plane that’s two or three layers away as a return. That whole perspective is perpetuated by the fact that the power delivery and simulation tools say that this is okay. They ignore the real impedance, which is defined by a single dielectric and two conductors. This allows the simulator to look at the power and ground conductors but ignores that other layers and dialectics are isolated in that space. Sometimes they’d think they have a good design, and we’d build it and have issues with either emissions or signal integrity. An awful lot of board stacks in the application notes, guidelines, and even example boards ignore that you really need to have power next to ground.

Those board stacks are out there and they're being repeated regularly. Does it always cause a failure? No. But it will always result in a board that consumes more power. Because it takes more wave cycles to move the energy. At the wave cycle is where you have most of the conversion of the electromagnetic field energy into kinetic energy. The IR drop is happening there. They will be more likely to be affected by ESD and interference. Even if they can manage to pass the standards for the industry they're servicing, it will reduce their long-term reliability. 

You can improve all of that by doing the good work stuff to improve reliability and lower power consumption. All that is money in your pocket, and it doesn't cost anything. It's using the materials you're already paying for in the right way. That's always been my mantra: “If I buy something, it better be doing something of value.” Otherwise, I won’t buy it, or I won’t change what it's doing. Take power planes, for example. People traditionally want to put a whole plane for a supply. But only a very small portion of that copper will be involved in the power delivery; the rest of it is doing nothing. If that’s the case, get rid of it. Change its job; make it a ground or another signal. You can combine layers and reduce layer count. 

Shaughnessy: Were the attendees younger people or a mix? 

Beeker: It was a pretty good mix. Pretty homogenous, and as I said, from young students to senior engineers.

Shaughnessy: It’s good to see that designers are interested in being proactive and attending classes.

Beeker: They don’t have a choice; it’s only going to get worse. As we keep shrinking the die in the transistor geometries, the flexibility and forgiveness of the devices is going to zero. We either do it right based on the laws of physics or it won’t work. The IC vendors are figuring that out too, and they're going to pretty extraordinary measures to accommodate their lack of focus on the physics. They're really good about the chemicals and the crystal, and all that chemical stuff and building semiconductors, but they don't apply the laws of electromagnetic field physics because for most of the history of our industry, the devices were lumped and so they could ignore it. That's the problem: Doing bad things that don't cause failures became the standard for design guidelines. Designing something that didn't make it break is not the same thing as designing it correctly. 

Shaughnessy: What are you teaching in your next class? 

Beeker: I have a session in Chiphead Theater on controlling the waves this afternoon. I will talk about waves from a very primitive perspective on physics and wave theory. For all the people who haven't thought of it this way, it will be a real mind-opener. I’ve basically taken everything I learned in the 10 or 15 years I worked with Ralph Morrison and distilled all that into a slide with three drawings. It’s really important for designers and design engineers to understand this. I record my classes, so if attendees have questions, they can always find my stuff online.

Shaughnessy: Always a pleasure, Dan. And it was a lot of fun having you play harmonica with us last night.

Beeker: My pleasure.