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Beyond the Rulebook
What happens when the rule book is no longer useful, or worse, was never written in the first place? In today’s fast-moving electronics landscape, we’re increasingly asked to design and build what has no precedent, no proven path, and no tidy checklist to follow. This is where “Design for Invention” begins.
March Madness
From the growing role of AI in design tools to the challenge of managing cumulative tolerances, these articles in this issue examine the technical details, design choices, and manufacturing considerations that determine whether a board works as intended.
Looking Forward to APEX EXPO 2026
I-Connect007 Magazine previews APEX EXPO 2026, covering everything from the show floor to the technical conference. For PCB designers, we move past the dreaded auto-router and spotlight AI design tools that actually matter.
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PCBAA Congratulates Cadenazzi on Assistant Secretary of War for Industrial Base Policy
September 19, 2025 | PCBAAEstimated reading time: 1 minute
In a recent announcement to the industry, David Schild, executive director of The Printed Circuit Board Association of America, highlighted the recent appointment of MIchael Cadenazzi as Assistant Secretary of War for Industrial Base Policy.
"The Printed Circuit Board Association of America congratulates MIchael Cadenazzi on his confirmation as Assistant Secretary of War for Industrial Base Policy. He has a deep understanding of defense industrial base issues based on his years of leadership experience in the military, defense industrial base businesses, and global consulting. We look forward to working with Assistant Secretary Cadenazzi as we jointly build a stronger trusted and secure microelectronics supply chain serving our men and women in uniform," said Schild.
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Sweeney Ng - CEE PCBSuggested Items
Single Pair Ethernet (SPE): A Valuable Option for Modern Designs
04/20/2026 | Marcy LaRont, I-Connect007When it comes to designing PCBs and full systems for increasingly complex electronics hardware, who doesn’t want to reduce complexity and cost? Single-Pair Ethernet (SPE) has emerged as a solution and is gaining rapid attention across industrial electronics and PCB design because it enables Ethernet communication over a single twisted pair, replacing the traditional two- or four-pair cabling used in standard Ethernet networks. This seemingly simple shift has significant implications for designers: smaller connectors, reduced cable weight, longer reach, and the ability to carry both data and power over a single pair.
Below the Surface: Looking Ahead to Where Integration Actually Happens
04/20/2026 | Chandra Gupta -- Column: Below the SurfaceProgress in RF rarely arrives and suddenly rewrites the rules. What actually moves performance forward almost always happens in the seams, the interfaces, the choices that determine whether individual parts are allowed to work together, or forced to fight one another. So, when we look ahead in RF systems—from DC through millimeter-wave—the most important conversations aren’t about isolated materials or heroic devices. They’re about integration, and more specifically, about how ceramic-based RF packages and module architectures shape system-level behavior long before the signal ever reaches free space.
Beyond the Board: How a Diminished Supplier Base Affects Complex PCB Manufacturing Readiness in Defense
04/14/2026 | Jesse Vaughan -- Column: Beyond the BoardAs mil/aero electronics push toward higher density, tighter tolerances, and more complex constructions, another trend has unfolded in parallel. It receives far less attention but carries equal consequence: A significant reduction in the number of fabricators that can support complex PCB manufacturing.
The Pivotal Role of AI in Modern Electronics Manufacturing with Koh Young
04/03/2026 | Real Time with... APEX EXPOJoel Scutchfield, of Koh Young America shares how accurate, measurement-based data fuels AI engines for enhanced inspection, auto-programming, and defect classification. Joel emphasizes how self-correction capabilities and data sharing across production lines, driving towards a future of automated, defect-free manufacturing.
Designers Notebook: Heterogeneous Interposer Design Challenge, Part 2
02/16/2026 | Vern Solberg -- Column: Designer's NotebookAs the need grows for higher processing speed and the expanded functionality required for newer generations of central processing units (CPUs), the necessity for higher-density interconnect solutions is paramount. The current trend toward furnishing a single, monolithic system-level semiconductor package has become a serious yield issue in fabrication. For example, with all of the peripheral supporting functions on a single die platform, wafer fabrication yields are often below target and, although the CPU portion of a monolithic semiconductor may be perfect, if one or more of the supporting functions on the same die fails, the entire processor unit must be discarded.