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As the industry embarks on the transition to post‑quantum cryptography (PQC), Microchip Technology is expanding its portfolio of Trust Shield, PQC‑ready devices with the TS1800 Platform Root of Trust controller and the TS50x secure boot controller. The devices are designed to help system architects address emerging cybersecurity mandates, including the European Cyber Resilience Act (CRA) and Commercial National Security Algorithm Suite 2.0 (CNSA 2.0), while supporting evolving data center, compute, defense, telecommunication and infrastructure security standards.
The TS1800 integrated circuit (IC) functions as an external Platform Root of Trust controller, enabling secure boot, secure firmware updates, attestation and certificate handling using hardware‑accelerated post‑quantum cryptography. These accelerators implement National Institute of Standards and Technology (NIST) standardized algorithms such as ML‑DSA (Module Lattice‑Based Digital Signature Algorithm), LMS (Leighton–Micali Signature) verification and ML‑KEM (Module Lattice‑Based Key Encapsulation Mechanism).
“The transition to post‑quantum cryptography is no longer a discussion for the future, it’s a real-world implementation challenge already at our doorstep, arriving faster than many organizations expected,” said Nuri Dagdeviren, corporate vice president of Microchip’s secure computing group. “At Microchip, we’re helping customers address this implementation challenge by building PQC readiness directly into the foundation of system trust, so platforms can evolve securely as new threats and standards emerge.”
Built around a high‑performance Arm® Cortex®‑M4F processor operating at up to 192 MHz, the TS1800 delivers up to twice the processing performance of previous generations of Microchip root of trust controllers, supporting the increased computational demands of post‑quantum cryptography (PQC) workloads. Architectural enhancements and regulator optimizations maintain power efficiency while supporting advanced platform security functions required for Open Compute Project (OCP)‑compliant implementations, including secure boot, firmware integrity validation, attestation and lifecycle management. The addition of USB 2.0 (full‑ and high‑speed) significantly reduces firmware update times compared to I²C and Serial Peripheral Interface (SPI) interfaces.
The TS50x family provides a PQC secure boot solution for systems that do not require the full OCP‑based Platform Root of Trust feature set offered in the TS1800 IC. TS50x devices have simpler architecture, focusing only on verify operations of PQC as well as classic cryptography, such as Elliptic Curve Cryptography (ECC) P-384, on signatures of a firmware booting from a SPI Flash. These devices hold the main chipset on reset until the signature verification is successful. This hybrid approach allows companies to retrofit classic ECC cryptography with PQC.
Both the TS1800 and TS50x controllers support PQC and align with requirements such as NIST SP 800‑193 platform resiliency guidelines and evolving security initiatives. The devices are available as part of the pre-configured TrustFLEX platform to help accelerate time to market. Designed as modular, drop‑in crypto-controllers, the devices help reduce the complexity and risk associated with upgrading cryptographic foundations across entire platforms.
By providing hardware‑based PQC capabilities at the root of trust, the TS1800 and TS50x controllers support true PQC-based secure boot implementations that begin at first power‑on, rather than relying on software‑based approaches where initial measurements are dependent on classic cryptography. The devices build on Microchip’s fourth‑generation Soteria firmware running on Zephyr® RTOS, designed to support evolving ecosystems and industry certification requirements.
