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The Bleeding Edge: The Very Latest in R&D

Robert Tarzwell with Ken Bahl - Sierra Proto Express

We would like to tell you all about the R&D program at Sierra Proto Express, but, as they say in the movies, "But then we'd have to kill you." So, grab a bulletproof vest and read about what we have been up to. The R&D department at Sierra Microelectronics is finalizing the development of sub 2-mil lines and 3-mil vias for production. Of course, there are always small details to get worked out as a technology moves from the R&D lab to the production shop, but we feel the technology is progressing well. Our new nano imaging units are in and installed in a 5000 class clean room, with the first R&D project featuring sub 1-mil lines ready for testing. Sierra has been producing lines as small as 380 nanometers in the lab for some time and will soon move the technology forward for limited alpha testing in the 0.5-mil (10 micron) line area.

Figure 1: 0.000015 inch (380 nanometer lines) on FR4. Notice how rough the 1 micron base copper is even at 500x magnification.

Our latest R&D testing is centered on shrinking the size of the microvias and associated pads, but even more important is the elimination of the pad. In a few short years, we have reduced the via pad from a minimum of a 12-mil pad, 6-mil hole to a 0.5-mil solid via with no pad. The technology is working now in the lab, but we all know the time to get new bleeding edge technology to market can be months to years. We do worry about markets and future production abilities when we design bleeding edge circuits, but we trust our ideas and inventions to only the best guys-like marketing guru, Dan Beaulieu and Roy Alcus, the Sierra Microelectronics manufacturing manager, to transform our crazy inventions into reality.

The improvement in packaging density of advanced micro electronics with the future potential to manufacture 10 micron lines combined with 10 micron vias will be wild, even beyond bleeding edge. This will mean, that in the very near future, designers could close the gap to present silicon densities, and shrink the size of our expensive little toys while adding even more features. A very small pitch of 50 microns, 0.05mm (2-mil) is a reality in the very near future as we are making them now in the lab.

Figure 2: A view of 25 micron lines, 30 micron high with 10 micron spaces.

The newest advantage to micro circuits with fine lines and small vias is the fan out of signal traces in a micro BGA package. When we talk to designers, the single biggest problem they report is getting the signal traces into and out of tight pitch chip packages. With future 10 micron lines and 25 micron vias, the layout will be significantly easier-utilizing fewer layers and less board surface area. The big change allowing this technology level is the separation of the dielectric layer, from one that has a via through the dielectric and a copper trace on top, to one with two layers where one is the via layer and the second layer is the traces buried within the dielectric. The very fine buried traces are tougher-featuring three sides of dielectric material to hold them on to the circuit. The micro via is shorter, allowing easier hole fill operations for a flatter top surface via in pad for soldering with improved signal frequency and thermal reliability.

Figure 3: Diagram of a micro BGA package with a 12 micron dielectric layer.

The R&D department at Sierra has found a way to produce thicker copper traces while maintaining the sub 1-mil line width. Typically, when we plate and etch copper, we have a 0.3 to 0.4 ratio of thickness to width. A 25 micron wide line is, at best, 10 microns thick. A 10 micron wide line is only 3 microns thick, which is too thin for proper circuit operation. With Sierra's new invention, the 10 micron line is now 15 microns thick, therefore removing a major roadblock to the future of sub 1-mil lines. As the line widths decrease, we still need as much copper as possible for current and voltage drop consideration, as well as strength. Increased voltage drops means increased noise and voltage fluctuations on the trace, which affects signal integrity.

Figure 4: Comparison of two different 10 micron lines; the second image is of Sierra's new invention that allows a 15 micron copper trace.

Last year's bleeding edge research and development is now in production at Sierra with very thin multilayers of 10 layers in 18-mil-thick packages being manufactured with sub 2-mil lines and spaces.

Bob Tarzwell, Director of Technology at Sierra Proto Express, is working with Ken Bahl to introduce new bleeding edge, advanced circuit technology like lead-free, high reliable electronics, heat sinking technology and ultra fine lines to the world. Since selling his company in 2000, Bob has disseminated PCB high-tech to many companies as a consultant, and has written ten books on PCBs and car racing. He has three patent-pending applications in fine lines, high reliability and outer space PCBs. He is currently semi-retired in the Bahamas, spending his free time writing books, working on antique cars and deep sea fishing.

Ken Bahl, President of Sierra Proto Express (San Jose, CA), started in the PCB business in 1965 as a process engineer with Honeywell in New Hampshire. In 1986, Ken founded Sierra Proto Express, the PCB industry's leader in innovative bleeding edge technologies-dedicated to producing Tomorrow's Technology Today.

For more information, visit http://www.protoexpress.com/.