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Estimated reading time: 4 minutes
Be Careful with Transmission Lines in Plane Models
In my past column “Simulating Planes with SPICE” we saw how we can determine the grid equivalent circuit parameters for a plane pair. We determined the parameters based on lossless transmission-line equations. You may wonder: Is it better to use LC lumped components in the SPICE netlist or to make use of SPICE’s built-in transmission line models? In short, we can use either of them, but we need to set up our models and expectations correctly.
Figure 1. Schematic symbol of a lossless transmission line on the left, and an L-C representation of an electrically short transmission line on the right.
Figure 1 shows a lossless transmission line schematics element, a transmission line, where the Tpd propagation delay and Zo characteristic impedance are all we need to describe the circuit. If the transmission line represents a trace, we assume that between nodes 2 and 4 we have a DC connectivity through the reference path, usually a plane. This assumption is also captured in the L-C equivalent circuit, where the reference sides of the input and output, nodes 2 and 4, are tied together.
If we use this L-C equivalent circuit for each plane cell in the grid model, we will provide DC continuity both on the high and low sides, exactly as we expect it from a power and ground plane pair. We also have to remember that for a single-lump L-C equivalent circuit to be valid to describe a transmission line, the sqrt(L*C) propagation delay has to be much smaller than the period of the highest frequency of interest.
However, when we use a SPICE Tline element in the SPICE grid circuit, inside SPICE the Tpd and Zo parameters will be converted to a behavioral model, shown in Figure 2. Note that the circuit is completely symmetrical, but more importantly it has no DC connection between the input and output sides, neither on the high side nor on the low side.
Why is this important for us to know? Because the transmission line behavioral model provides only differential description of the circuit, we DO NOT have any direct connectivity laterally, between the high-side and low-side input and output terminals. This means that with a transmission line grid we can not simulate the voltage drop horizontally along the planes, neither DC nor AC.
Figure 2. Equivalent SPICE circuit of a lossless transmission line.
Using lossless models like shown in Figure 1, we would expect zero DC drop both in the upper and lower planes. Instead, when we use a Tline grid, we will get the response of an open circuit. In the L-C equivalent circuit shown on the right of Figure 1, we get the proper DC connectivity in both the upper and lower paths. The ideal resistanceless L inductor in the upper path connects nodes 1 and 3. The connectivity in the lower path is simply retained by an ideal connection between nodes 2 and 4. On the other hand, getting the proper connectivity at DC really does not really matter for a lossless model, because we expect zero voltage drop anyway. It matters, however, for lossy models and also at AC. If we place a resistor in series to the transmission line model or in series to the inductor, as shown in Figure 3, we can model the horizontal voltage drop due to plane resistance.
Figure 3. Schematics of a lossy transmission line on the left, and an L-C representation of an electrically short lossy transmission line on the right.
To ensure causality, in Figure 3 the circuit elements should be frequency-dependent. THE TRANSMISSION LINE WITH R-G LOSSES IS NOT CAUSAL! The G1 parallel conductance represents the dielectric losses, R1 accounts for the sum of the resistive losses in the upper and lower planes. If we want to simulate the voltage drop separately in the upper and lower planes, we can split R1 and place the resistor representing the lower plane’s loss in the lower path.
This way we can simulate both the differential plane behavior and the horizontal voltage drop with the same circuit. Unfortunately the equivalent circuit shown on the left of Figure 3, using the transmission line element, still will not provide horizontal connectivity. One workaround is that instead of using a single R1 in series of the Tline, we can place a series resistor between terminals 1 and 3, which will represent the resistance in the upper plane, and a resistor between terminals 2 and 4 to represent the resistance of the lower plane.
Dr. Istvan Novak is a distinguished engineer at Oracle, working on signal and power integrity designs of mid-range servers and new technology developments. Novak received his M.S. degree from the Technical University of Budapest, Hungary and his Ph.D. degree from the Hungarian Academy of Sciences in 1976 and 1989, respectively. With 25 patents to his name, Novak is co-author of "Frequency-Domain Characterization of Power Distribution Networks." To contact Istvan, click here.
More Columns from Quiet Power
Quiet Power: An Evolution in PCB Design CostsQuiet Power: The Effect on SI and PI Board Performance
Quiet Power: 3D Effects in Power Distribution Networks
Quiet Power: Noise Mitigation in Power Planes
Quiet Power: Uncompensated DC Drop in Power Distribution Networks
Quiet Power: Ask the Experts—PDN Filters
Quiet Power: Friends and Enemies in Power Distribution
Quiet Power: Be Aware of Default Values in Circuit Simulators