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Beyond Design: Signal Integrity, Part 2

In Part 1 of my signal integrity series, I examined how advanced IC fabrication techniques have created havoc with signal quality and radiated emissions. This month’s column will cover the effects of crosstalk, timing and skew on signal quality.

Crosstalk

Crosstalk is the unintentional electromagnetic coupling between traces on a PCB. But crosstalk can also be induced in the return path, which often gets overlooked. Figure 1 shows the crosstalk associated with two parallel trace segments on the outer (microstrip) layer of a PCB.

The red lines represent the magnetic field that couples voltage inductively to the nearby trace and also radiates electromagnetic emissions. The blue lines are electric fields that capacitively couple current into the nearby trace and are somewhat absorbed by the plane but still tend to radiate noise outward.

Crosstalk can be coupled trace-to-trace, on the same layer, or can be broadside coupled by traces on adjacent layers. The coupling is three-dimensional. Broadside coupling is difficult to spot, because generally we look for trace clearances on the same layer when evaluating crosstalk, but a simulator will pick this up. Traces routed in parallel and broadside cause greater amounts of crosstalk than those routed side by side. This is due to the width of the trace being much larger than the thickness, so more coupling occurs in the broadside configuration.  It is therefore good practice to route adjacent signal layers, in the stackup, orthogonally to each other to minimize the coupling region. A better solution is to only have one signal layer between two planes to totally avoid broadside coupling altogether.

Also, these days many stackups use a buildup microstrip layer on the top and bottom of the board. This can be very dangerous as one must take particular care of traces routed on the adjacent layers.

Since crosstalk is induced by one or more aggressors onto a victim trace, it is obvious that the higher the aggressor voltage, the more crosstalk will be induced. It is therefore best to segregate groups of nets according to their signal amplitude. This strategy prevents larger voltage nets (3.3V) from affecting smaller voltage nets (1.5V).Read the full column here.Editor's Note: This column originally appeared in the November 2014 issue of The PCB Design Magazine.