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Power Integrity
Current power demands are increasing, especially with AI, 5G, and EV chips. This month, our experts share “watt’s up” with power integrity, from planning and layout through measurement and manufacturing.
Signal Integrity
If you don’t have signal integrity problems now, you will eventually. This month, our expert contributors share a variety of SI techniques that can help designers avoid ground bounce, crosstalk, parasitic issues, and much more.
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Floor planning decisions can make or break performance, manufacturability, and timelines. This month’s contributors weigh in with their best practices for proper floor planning and specific strategies to get it right.
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Keysight Seminar Focuses on Signal/Power Integrity
July 13, 2015 | Keysight Technologies, Inc.Estimated reading time: Less than a minute
This free seminar will discuss the new features included in Keysight’s EEsof EDA simulation tools and how the software helps engineers focused on high-speed digital electronics solve their toughest design challenges. The seminar will look at all stages of the pre-layout, post-layout and measurement design flow.
Tools featured in the seminar include: ADS, ADS Controlled Impedance Line Designer (CILD), SI S-parameter analysis tools, and the ADS PCIe and USB test benches used with Keysight real-time oscilloscope certified test compliance software.
Attendees also will see a preview of the new power integrity PI Pro simulator with IR drop and decoupling capacitor optimization, available in upcoming release of ADS 2015.09. Registration is required to attend.
When:
July 14 and July 16
Where:
Agilent Technologies, 5301 Stevens Creek Boulevard, Santa Clara, CA, the Aristotle Room.
To register, click here. For additional information, visit www.keysight.com/find/eesof.
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