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Mentor Graphics Video: Automatically Unravel Complex FPGA Signals
December 2, 2015 | Mentor GraphicsEstimated reading time: Less than a minute
Optimizing large pin-count FPGAs is challenging. Manual optimization can take days and result in reduced quality.
This new video from Mentor Graphics shows how signal pin assignments can be automatically optimized between multiple FPGAs on the PCB while respecting pin-specific rules and constraints. Reduce the number of routing layers, minimize crossovers and overall trace lengths on the PCB, and reduce signal integrity issues for higher completion rates and shorter FPGA route times.
To watch this video, click here.
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Elementary Mr. Watson: Chasing Checkmarks, Not Signal Integrity
10/01/2025 | John Watson -- Column: Elementary, Mr. WatsonFor the September 2025 issue of Design007 Magazine on signal integrity, I explored how the PCB is similar to a military obstacle course: walls that sap energy like impedance mismatches, barbed wire that cuts like crosstalk, and mud pits that drag a signal down like attenuation. The takeaway was clear that a PCB is not a flat drawing; it's an electromagnetic ecosystem filled with hazards that test every signal that dares to cross it. The real danger lies not in the obstacles themselves, but in the fact that many designers never see them.
Signal Integrity: A Game of Margins
09/25/2025 | Andy Shaughnessy, Design007 MagazineAs the founder of Wild River Technology, Al Neves deals with some of the most challenging aspects of signal integrity. Wild River’s engineers consult with high-tech companies that work at very high speeds and frequencies, often above 100G. Al is always a fun interview, so we asked him to share his thoughts on the current state of signal integrity engineering.
Understanding Signal Integrity, the Foundation of High-Speed Digital Design
09/25/2025 | Stephen V. Chavez, Siemens EDASignal integrity has become a critical factor in ensuring reliable performance in high-speed digital systems. As data rates continue to increase, engineers must understand the fundamental principles that govern how signals propagate through transmission lines and how to mitigate common issues that can degrade signal quality.
Beyond Design: Slaying Signal Integrity Villains
09/17/2025 | Barry Olney -- Column: Beyond DesignHigh-speed PCB design is a balancing act, where subtle oversights can develop into major signal integrity nightmares. Some culprits lie dormant during early validation, only to reveal themselves later through workflow disruptions and elusive performance bottlenecks. Take crosstalk, for example. What begins as a stray signal coupling between traces can ripple through the design, ultimately destabilizing the power distribution network. Each of these troublemakers operates with signature tactics, but they also have well-known vulnerabilities.
Staying on Top of Signal Integrity Challenges
09/16/2025 | Andy Shaughnessy, Design007 MagazineOver the years, Kris Moyer has taught a variety of advanced PCB design classes, both online IPC courses and in-person classes at California State University-Sacramento, where he earned his degrees in electrical engineering. Much of his advanced curriculum focuses on signal integrity, so we asked Kris to discuss the trends he’s seeing in signal integrity today, the SI challenges facing PCB designers, and his go-to techniques for controlling or completely eliminating SI problems.