Target Condition: Are Autorouters Friend or Foe?
Fresh PCB Concepts: Assembly Challenges with Micro Components and Standard Solder Mask Practices
Elementary Mr. Watson: Retro Routers vs. Modern Boards—The Silent Struggle on Your Screen
Cadence Paper: Automating Inter-Layer In-Design Checks in Rigid-Flex PCBs
May 25, 2016 | Ed Hickey, Cadence Design SystemsEstimated reading time: 10 minutes
New In-Design Inter-Layer Checks Prevent Frustrating Iterations
For today’s flex and rigid-flex designs, PCB designers need to be able to perform comprehensive in-design interlayer checks of the non-conducive layers in rigid-flex PCBs, shortening the design cycle by minimizing ECAD/MCAD iterations and lowering overall end-product costs. Errors should be flagged as soon as they are created, following a correct-by-construction methodology that helps designers avoid excessive iterations and expensive respins. An actual view of what is being built can allow designers to visualize their layout stack-up based on zones. With an accurate picture, designers can perform more accurate DRCs, receive better feedback, and provide better data to the MCAD tool for fabrication (Figure 5).
Since there are many different materials and different rules a PCB designer needs to deal with, enabling and specifying rules for the combination of layers should be intuitive and easy. A simple step-by-step process (Figure 6) involves:
- Selecting the layer by choosing the desired checkbox in the layer matrix
- Selecting the rule
- Setting the value
- Defining a label that means something to the designer
- Setting the DRC display layer
- Adding a description for the rule (rules should be preserved in the tool)
Users should be able to run inter-layer checks online or offline and in batch mode. When running the checks online, the user simply sets the rules and should be able to run the DRC and view DRC results.
Most EDA tools have long supported rigid-flex PCB designs. Ideally, the latest versions of these tools need to address new challenges stemming from multiple board layers, while providing a wide breadth and depth of in-design checks covering more than 30 new native flex and surface finishes layers (Figures 7 and 8). Users should also be able to incorporate their own layers for the tool to check, so they don’t have to wait for tool updates.
Cadence’s Allegro® 17.2 PCB design portfolio automates inter-layer, in-design checks in rigid-flex PCBs, providing the capabilities discussed in this section. By allowing you to perform DRCs for various non-electrical flex layers, the tool helps to save time and avoid respins. The tool also supports real-time concurrent team design, so multiple PCB designers can work on the same PCB design database.
How much time a PCB designer can save using the rigid-flex design capability versus performing manual DRCs (and going through iterations with the fabricator) is proportional to the complexity of the design. Aside from time savings, another benefit from using the capability is the ability to prevent omissions or other errors that could impact PCB design quality and overall cost. After all, problems that are discovered by the fabricator will naturally be more costly and time consuming to resolve due to the rework and iterations needed.
Page 3 of 4
Share on:
Suggested Items
Driving Innovation: Direct Imaging vs. Conventional Exposure
07/01/2025 | Simon Khesin -- Column: Driving InnovationMy first camera used Kodak film. I even experimented with developing photos in the bathroom, though I usually dropped the film off at a Kodak center and received the prints two weeks later, only to discover that some images were out of focus or poorly framed. Today, every smartphone contains a high-quality camera capable of producing stunning images instantly.
Hands-On Demos Now Available for Apollo Seiko’s EF and AF Selective Soldering Lines
06/30/2025 | Apollo SeikoApollo Seiko, a leading innovator in soldering technology, is excited to spotlight its expanded lineup of EF and AF Series Selective Soldering Systems, now available for live demonstrations in its newly dedicated demo room.
Indium Corporation Expert to Present on Automotive and Industrial Solder Bonding Solutions at Global Electronics Association Workshop
06/26/2025 | IndiumIndium Corporation Principal Engineer, Advanced Materials, Andy Mackie, Ph.D., MSc, will deliver a technical presentation on innovative solder bonding solutions for automotive and industrial applications at the Global Electronics A
Fresh PCB Concepts: Assembly Challenges with Micro Components and Standard Solder Mask Practices
06/26/2025 | Team NCAB -- Column: Fresh PCB ConceptsMicro components have redefined what is possible in PCB design. With package sizes like 01005 and 0201 becoming more common in high-density layouts, designers are now expected to pack more performance into smaller spaces than ever before. While these advancements support miniaturization and functionality, they introduce new assembly challenges, particularly with traditional solder mask and legend application processes.
Knocking Down the Bone Pile: Tin Whisker Mitigation in Aerospace Applications, Part 3
06/25/2025 | Nash Bell -- Column: Knocking Down the Bone PileTin whiskers are slender, hair-like metallic growths that can develop on the surface of tin-plated electronic components. Typically measuring a few micrometers in diameter and growing several millimeters in length, they form through an electrochemical process influenced by environmental factors such as temperature variations, mechanical or compressive stress, and the aging of solder alloys.