-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueThe Designer of the Future
Our expert contributors peer into their crystal balls and offer their thoughts on the designers and design engineers of tomorrow, and what their jobs will look like.
Advanced Packaging and Stackup Design
This month, our expert contributors discuss the impact of advanced packaging on stackup design—from SI and DFM challenges through the variety of material tradeoffs that designers must contend with in HDI and UHDI.
Rules of Thumb
This month, we delve into rules of thumb—which ones work, which ones should be avoided. Rules of thumb are everywhere, but there may be hundreds of rules of thumb for PCB design. How do we separate the wheat from the chaff, so to speak?
- Articles
- Columns
Search Console
- Links
- Media kit
||| MENU - design007 Magazine
A Textbook Look: Signal Integrity and Impedance
May 18, 2022 | Pete Starkey, I-Connect007Estimated reading time: 5 minutes
Believing that I knew a bit about signal integrity and controlled impedance, I was pleased to take the opportunity to connect with an educational webinar that I hoped would extend my knowledge. In the event I was surprised at how little I actually knew, and the webinar was an excellent learning opportunity.
Jointly organised by NCAB Group, Polar Instruments and Phoenix Contact, it brought together three expert speakers who shared their knowledge on the theoretical basis of signal integrity, the customer technical and engineering support provided by a global PCB supplier, and the design and optimization of high-speed data connectors.
The webinar was introduced and expertly moderated by Anna Brockman, team leader campaigns and media management at Phoenix Contact in Germany.
Hermann Reischer, managing director of Polar Instruments in Austria, gave the clearest first-principles explanation of signal integrity and controlled impedance that I have experienced in many years. He made the topic intelligible and understandable by breaking it into its most basic elements and explaining each in plain language with meaningful illustrations.
Against a background of high-speed requirements such as 77 GHz analogue frequencies in automotive radar applications, and ever-rising digital data rates with pico-second rise times, the printed circuit board ceased to be a passive interconnecting substrate and became a complex component in its own right. A PCB trace behaved like a transmission line when its physical length was of the same order as the electrical wavelength of the transmitted signal.
He examined the properties of a transmission line: in addition to its DC resistance it experienced a propagation delay depending on the dielectric characteristics of the material surrounding it, which also contributed to losses as well as those attributed to copper roughness and line length. The transmission line had a characteristic impedance determined by trace width, dielectric spacing, and relative permittivity. All of these parameters needed to be considered in order to ensure signal integrity, which became increasingly difficult to maintain as frequency increased. PCB material selection and stack-up, trace width, dielectric separation, design and layout, and component placement were all critical.
Reischer explained how a transmission line could be considered in terms of a series of inductors and capacitors and described how a signal was propagated along it, charging each successive capacitor element. The goal was to achieve constant impedance across the entire length of the line, with a uniform voltage and current wave-front in order to ensure good signal integrity. The propagation speed of an electromagnetic wave was a function of the speed of light and the permittivity of the dielectric, which for air or vacuum was 1.0. In typical PCB materials with relative permittivity around 4.0, the propagation speed was reduced from the speed of light to about half that value.
The “critical line length,” beyond which a conductor would be considered a transmission line, was related to the rise time of the signal. Early semiconductor devices had rise times of around 5 nanoseconds, giving a bandwidth of 70 MHz and a critical length of 36 cm. Current gallium arsenide devices had rise times of 0.3 nanoseconds, giving bandwidth of 1.166 GHz and a critical length of 2 cm.
He clarified the differences in propagation characteristics between low-speed and high-speed signals, and he explained the ways in which electromagnetic waves were reflected at impedance discontinuities. Impedance matching offered a solution, and he gave an example of a typical transmission system where the impedances of the source, the transmission line, and the termination were matched at 50 ohms. This was generic in a radio frequency environment; 75 ohms was typical in video applications, 90 ohms in USB transmission, and 100 ohms for Ethernet.
Reischer commented that his system example illustrated the essential interaction between the three companies contributing to the webinar: Phoenix Contact supplying interconnects, NCAB Group supplying printed circuit boards, and Polar Instruments supplying simulation tools for calculating impedance.
So how to make sure that the transmission path had the correct impedance? He took a familiar example of a coaxial cable, whose impedance was determined by its geometry and the permittivity of the insulating material and demonstrated how the principles could be adapted to the planar structure of a PCB in the form of an offset stripline. The geometry and the permittivity of the material determined the impedance, and he showed a range of examples of “single-ended” structures. In contrast were “differential” structures, widely used in digital transmission systems, usually consisting of two traces running in parallel and coupled with a capacitor. The advantages of differential signalling included improved noise immunity, lower voltage requirements, and higher data rates.
Reischer listed the factors influencing impedance. Trace width was the most significant and was simple to modify. Substrate height, relative permittivity, and copper thickness were determined by material selection, and etch-back was process-dependent. Solder mask thickness could have a significant effect on the properties of edge-coupled microstrip designs, as could the influence of local resin-rich areas if similar features were embedded within the structure of the PCB. He discussed the practical aspects of resin distribution and thickness control during multilayer pressing.
Vias gave some interesting effects; they were generally quite small compared with the wavelength of the signal, so they could normally be ignored except at extremely high frequencies. But on thick boards, as via stub-length approached a quarter of the wavelength of the signal, they could cause undesirable resonance. Back-drilling was a technique used to mitigate these effects.
Future challenges included tighter impedance tolerance specifications, lower dielectric thicknesses and narrower trace widths. Frequencies beyond 5 GHz resulted in “lossy” transmission lines; dielectric losses could be reduced by using new base materials and smoother copper could reduce skin effects, both at increased material cost. From a design point of view, Reischer recommended keeping traces as short as possible and ensuring uninterrupted signal return paths. For various reasons it was preferred to place critical lines on inner layers. And he emphasised the importance of consulting with the PCB vendor on stack-up design and material selection before commencing the layout.
To read this entire article, which appeared in the May 2022 issue of Design007 Magazine, click here.
Suggested Items
Dr. Jennie Hwang to Deliver Two PDCs at IPC APEX
02/04/2025 | Dr. Jennie HwangDr. Jennie Hwang, Chair of the AI Committee of National Academies/DoD AI study, Chair of National AI Institute of NSF, and Committee of Strategic Thinking for Engineering Research in the Era of Artificial Intelligence of NSF, brings broad-based information and insights through an integrated perspective to the AI course.
TopLine Bringing Answers, New Ideas to APEX 2025
02/04/2025 | TopLineTopLine® Corporation’s engineers will discuss groundbreaking technologies and product solutions at the upcoming IPC APEX EXPO 2025 this coming March 18-20 at the Anaheim Convention Center in California.
Solderstar to Present Advanced Profiling Solutions at IPC APEX EXPO 2025
02/04/2025 | SolderStarSolderstar, a leading provider of profiling solutions for the electronics manufacturing industry, will exhibit at IPC APEX EXPO 2025, which will take place March 18-20, 2025, at the Anaheim Convention Center in California.
Rehm Thermal Systems: Future Technologies for Coating, Dispensing and Vapour Phase Soldering Live at IPC APEX EXPO 2025
02/04/2025 | Rehm Thermal SystemsIPC APEX EXPO 2024, which takes place from 18 to 20 March at the Anaheim Convention Center in California, is the largest and most important trade fair for electronics manufacturing in North America.
YINCAE Launches UF 120LA
02/04/2025 | YINCAEYINCAE has introduced UF 120LA, a high-purity liquid epoxy underfill engineered for advanced electronics packaging. With exceptional flowability into 20μ gaps, UF 120LA eliminates cleaning processes, reducing costs and environmental impact while ensuring superior performance across applications like BGA, flip chip, WLCSP, and multi-chip modules.