-
- News
- Books
Featured Books
- pcb007 Magazine
Latest Issues
Current IssueThe Hole Truth: Via Integrity in an HDI World
From the drilled hole to registration across multiple sequential lamination cycles, to the quality of your copper plating, via reliability in an HDI world is becoming an ever-greater challenge. This month we look at “The Hole Truth,” from creating the “perfect” via to how you can assure via quality and reliability, the first time, every time.
In Pursuit of Perfection: Defect Reduction
For bare PCB board fabrication, defect reduction is a critical aspect of a company's bottom line profitability. In this issue, we examine how imaging, etching, and plating processes can provide information and insight into reducing defects and increasing yields.
Voices of the Industry
We take the pulse of the PCB industry by sharing insights from leading fabricators and suppliers in this month's issue. We've gathered their thoughts on the new U.S. administration, spending, the war in Ukraine, and their most pressing needs. It’s an eye-opening and enlightening look behind the curtain.
- Articles
- Columns
- Links
- Media kit
||| MENU - pcb007 Magazine
Electrical Testing of Passive Components
September 2, 2014 |Estimated reading time: 1 minute
Introduction
Substrates have become more critical with regard to pitch and density in today’s designs with challenges for passive components in terms of surface placement. This negates the opportunity for high speed, high cost components to be placed on the surfaces of the PCB. With this the capacitance and resistive components have to be embedded into the design. This has been accomplished with the advent of buried capacitance cores and buried resistors. Unfortunately, this has caused some challenges to the ET test centers/labs in the ability to effectively test these buried passive components. Processes have had to change and adapt to these new technologies. The paper will discuss what these new technologies are and how the electrical test arena has adapted to provide accurate testing of the buried resistors and accommodate the buried capacitive cores to not receive false errors from the grid testers and flying probes.
Resistors
In the past, pull-up, terminating and voltage dividing resistors have been placed on the surface of the PCB. Early applications were standard carbon resistors placed on the board utilizing plated through-holes.
As can be seen in Figure 1, the standard carbon resistor took up a lot of space on the PCB. You will also notice in the photo that capacitors are also stealing valuable space from the surface topography. As time progressed, SMT technology was introduced and the older, bulky standard carbon resistor was replaced by the newer SMT packages (Figure 2).
This was a very popular innovation to the industry as now the surface footprint was drastically reduced and the topography on the surface of the PCB was now open to accommodate more active components which reduced the overall size of the PCB, but also allowed the complexity of the designs to grow. No longer was a PTH as needed for the resistor, which allowed the multilayer to expand its capabilities on the inner layers to provide not only an overall smaller PCB, but a more powerful final product.
Read the full article here.
Editor's Note: This article originally appeared in the July 2014 issue of The PCB Magazine.
Suggested Items
Meet the Author Podcast: Martyn Gaudion Unpacks the Secrets of High-Speed PCB Design
07/10/2025 | I-Connect007In this special Meet the Author episode of the On the Line with… podcast, Nolan Johnson sits down with Martyn Gaudion, signal integrity expert, managing director of Polar Instruments, and three-time author in I-Connect007’s popular The Printed Circuit Designer’s Guide to... series.
TTCI Joins Printed Circuit Engineering Association to Strengthen Design-to-Test Collaboration and Workforce Development
07/09/2025 | The Test Connection Inc.The Test Connection Inc. (TTCI), a leading provider of electronic test and manufacturing solutions, is proud to announce its membership in the Printed Circuit Engineering Association (PCEA), further expanding the company’s efforts to support cross-functional collaboration, industry standards, and technical education in the printed circuit design and manufacturing community.
Study on Resonance Mitigation in Metallic Shielding for Integrated Circuits
07/08/2025 | Maria Cuesta-Martin, Victor Martinez, Vidal Gonzalez Aguado, Würth ElektronikInherent cavity resonant modes often lead to significant degradation of shielding effectiveness, responsible for unwanted electromagnetic coupling. Cavity resonant modes of the metal shielding enclosure can produce two adverse problems: the mutual coupling among different RF modules and shielding effectiveness reduction of the metal enclosure. The cabinets serve to shield certain components from electromagnetic interference (EMI). However, these cavities present some resonance peaks at 5 GHz, making it impossible to use them at higher frequencies.
The Global Electronics Association Releases IPC-8911: First-Ever Conductive Yarn Standard for E-Textile Application
07/02/2025 | Global Electronics AssociationThe Global Electronics Association announces the release of IPC-8911, Requirements for Conductive Yarns for E-Textiles Applications. This first-of-its-kind global standard establishes a clear framework for classifying, designating, and qualifying conductive yarns—helping to address longstanding challenges in supply chain communication, product testing, and material selection within the growing e-textiles industry.
Magnalytix and Foresite to Host Technical Webinar on SIR Testing and Functional Reliability
06/26/2025 | MAGNALYTIXMagnalytix, in collaboration with Foresite Inc., is pleased to announce an upcoming one-hour Webinar Workshop titled “Comparing SIR IPC B-52 to Umpire 41 Functional & SIR Test Method.” This session will be held on July 24, 2025, and is open to professionals in electronics manufacturing, reliability engineering, and process development seeking insights into new testing standards for climatic reliability.