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Cadence Revolutionizes System Design with Optimality Explorer for AI-Driven Optimization of Electronic Systems
June 10, 2022 | Cadence Design Systems, Inc.Estimated reading time: 3 minutes
Cadence Design Systems, Inc. announced the Cadence® Optimality Intelligent System Explorer, which enables multi-disciplinary analysis and optimization (MDAO) realization of electronic systems. After revolutionizing simulation and delivering several products with breakthrough performance and accuracy, Cadence has focused on optimization, first introducing the disruptive Cadence Cerebrus™ Intelligent Chip Explorer, and now Optimality Explorer. Leveraging similar AI technology as used in Cadence Cerebrus to yield groundbreaking results, Optimality Explorer delivers optimized designs on average 10X faster than traditional manual methods, with up to a 100X speedup realized on some designs. Optimality Explorer further extends Cadence’s system analysis leadership by delivering to market an industry first: an AI-driven, MDAO-enabled in-design multiphysics system analysis solution.
Cadence’s Clarity™ 3D Solver for 3D electromagnetic (EM) analysis and Sigrity™ X technologies for high-speed signal integrity (SI) and power integrity (PI) analyses are the first Cadence multiphysics system analysis software products to embrace Optimality Explorer. With Optimality Explorer, Clarity and Sigrity X solvers can significantly improve designers’ productivity and efficiency by enabling design teams to explore the entire design space and quickly and efficiently converge on the optimal design.
Optimality Intelligent System Explorer delivers the following benefits:
- Design insight: Enables designers to quickly determine optimum electrical performance, avoiding suboptimal local minima and maxima, while mapping variations for additional consideration and exploration of the complete design space
- Improved productivity: Empowers design engineers and teams to efficiently achieve optimized system-level designs, improving productivity by 10X on average when compared to manual, brute-force parametric table studies, with up to a 100X speedup realized on some designs
- Easy-to-use interface: Flexible use model allows customers to activate Optimality Explorer from the Clarity and Sigrity X environments for fast invocation of MDAO
- Extensible solution: Allows customers to extend AI-driven optimization across Cadence’s multiphysics technologies to create a comprehensive computational software solution spanning simulation, optimization and signoff
“For years, optimization at the system level has been extremely inefficient based on a human-intensive workflow of design/prototype/test/refine and eventual manufacturing,” said Ben Gu, vice president of R&D for the Multiphysics System Analysis Business Unit at Cadence. “With Optimality Explorer’s MDAO capability, it’s now possible to perform system-level optimization, from the IC to the package, the PCB and the system, in a fraction of the time and with Cadence’s signature gold-standard accuracy.”
Customer Endorsements
“In a high-speed package design, it’s a cost- and performance-effective process to optimize the design before taping out. For our DDR package optimization process, Cadence’s Optimality Explorer-empowered Clarity 3D Solver enabled us to uncover the best parameter configuration, meeting our design criteria in a dramatically shorter time window, thereby speeding up our time to market while enabling us to deliver a higher performing solution,” said Alan Zhu, VP of Hardware at Ambarella.
“The Clarity 3D Solver provided unparalleled speed and capacity with proven accuracy throughout our next-generation Kunlunxin AI chip project. We utilize Clarity 3D Solver for high-speed channel modeling and optimization. Now, with Cadence’s Optimality Explorer, we reduced the amount of time we spent on optimizing transmission line performance from hours to minutes. We were able to tune the physical parameters of a high-speed differential pair routing constraint much faster than previous methodologies. The time saved can be used to optimize other parts of our design so that all critical interfaces operate at peak performance,” said Canghai Gu, Chief Chip Architect of Kunlunxin at Baidu
“MediaTek is a leader in SerDes design and technology. The Cadence Optimality Explorer and Clarity 3D Solver allowed us to realize a 75% performance improvement for our recent 112G PAM4 SerDes project. The optimum return and insertion loss, and TDR waveforms, were determined quickly and efficiently due to Cadence’s breakthrough AI-driven optimization, accelerating the design team’s productivity and ultimately the success of the final product,” said Aaron Yang and Howard Yin, Design Directors at MediaTek.
“As an early adopter of the Cadence Optimality Intelligent System Explorer, we stressed its performance on a rigid-flex PCB with multiple via structures and transmission lines. The Optimality Explorer’s AI-driven optimization allowed us to uncover novel designs and methodologies that we would not have achieved otherwise. Optimality Explorer adds intelligence to the powerful Clarity 3D Solver, letting us meet our performance target with accelerated efficiency,” said Kyle Chen, Principal Hardware Engineer at Microsoft.
Suggested Items
Rules of Thumb for PCB Layout
11/21/2024 | Andy Shaughnessy, I-Connect007The dictionary defines a “rule of thumb” as “a broadly accurate guide or principle, based on experience or practice rather than theory.” Rules of thumb are often the foundation of a PCB designer’s thought process when tackling a layout. Ultimately, a product spec or design guideline will provide the detailed design guidance, but rules of thumb can help to provide the general guidance that will help to streamline the layout process and avoid design or manufacturing issues.
PCB Design Software Market Expected to Hit $9.2B by 2031
11/21/2024 | openPRThis report provides an overview of the PCB design software market, detailing key market drivers, challenges, technological advancements, regional dynamics, and future trends. With a projected compound annual growth rate (CAGR) of 13.4% from 2024 to 2031, the market is expected to grow from USD 3.9 billion in 2024 to USD 9.2 billion by 2031.
KYZEN to Spotlight KYZEN E5631, AQUANOX A4618 and Process Control at SMTA Silicon Valley Expo and Tech Forum
11/21/2024 | KYZEN'KYZEN, the global leader in innovative environmentally friendly cleaning chemistries, will exhibit at the SMTA Silicon Valley Expo & Tech Forum on Thursday, December 5, 2024 at the Fremont Marriott Silicon Valley in Fremont, CA.
Flexible Thinking: Rules of Thumb: A Word to the Wise
11/20/2024 | Joe Fjelstad -- Column: Flexible ThinkingIn the early days of electronics manufacturing—especially with PCBs—there were no rules. Engineers, scientists, and technicians largely felt their way around in the dark, making things up as they went along. There was a great deal of innovation, guessing, and testing to make sure that early guidelines and estimates were correct by testing them. Still, they frequently made mistakes.
Cadence Unveils Arm-Based System Chiplet
11/20/2024 | Cadence Design SystemsCadence has announced a groundbreaking achievement with the development and successful tapeout of its first Arm-based system chiplet. This innovation marks a pivotal advancement in chiplet technology, showcasing Cadence's commitment to driving industry-leading solutions through its chiplet architecture and framework.