DFM: Top Ten PCB Concerns

Estimated reading time: 8 minutes

DFM, DRC, DFF, DFA, and DFX are all terms we routinely hear in relation to PCB design that are often used interchangeably. But DFM—design for manufacturability—is a critically important but often ignored aspect of the PCB design process that directly impacts product quality and reliability. This column will discuss the top 10 DFM concerns that should be part of any design review process.

What is DFM?

Technology is disruptive, and if you believe the experts, technological advancement over the next five years will be 32x today’s level. The smaller/faster/cheaper drivers of printed circuit and electronic component technology have created several new challenges for electronic manufacturing companies over the past few decades. The ability to source components globally has resulted in more companies entering the market and increased pressure to reduce time-to-market product launches. Properly planned and implemented DFM processes are enabling these companies to develop quality products in less time and at lower production costs. Higher quality at a lower cost is a winning formula for more sales and greater customer loyalty.

The two key goals of DFM are:

1. Minimize product cost through design and process improvements.
2. Minimize product quality and reliability concerns.

DFM should be done, of course, by the ODM/OEM during the design process, but also by the PCB fabricator through a DRC (design rule check), and DFF (design for fabrication). The fabricator can provide invaluable insight into design issues that can add cost and/or cause undue risk during the fabrication process. This perspective can provide the ODM/OEM guidance on everything from material selection to catastrophic design flaws. They are the fabrication experts—listen to them!

Top 10 PCB DFM Concerns

While the things that can be detected during DFM are virtually endless, the list below reflects some of the most common and detrimental issues that can impact cost, quality and reliability. 

1. Acid traps
2. Insufficient copper-to-edge clearance
3. Drills and pad stacks
4. Impedance
5. Test points that are not included
6. Missing soldermask between pads
7. Slivers
8. Starved thermals
9. Trace and space
10. Via structures

Acid Traps

This is the common term for acute angles in a circuit that allow plating and etching acids (micro-etches) to become trapped during the fabrication process, resulting in a potential to over-etch a trace and create an open in the circuit. As the acid builds up in the “nook” of the angle, the angle functionally keeps the acid in the corner for a longer period than the design calls for, causing the acid to eat away more than intended. As a result, the acid can compromise a connection, making the circuit defective and causing more serious problems later on. Most designers are aware of the problems caused by acute angles in a circuit board and are therefore trained to avoid them. However, mistakes do happen. Often, acute angles are the result of simple human error, although some design software programs may also set circuits to acute angles if the settings are not properly adjusted. Most designers will catch acute angles as they double-check their work, and a good fabricator will catch these mistakes with a DFM check.

Figure 1: Acute circuit design angle will entrap acids.

Insufficient Copper-to-Edge Clearance

Copper is an incredibly conductive metal, which is used as an active component of PCBs. However, copper is also relatively soft and vulnerable to corrosion. To prevent corrosion and protect the copper from interacting with its environment, this copper is covered with other materials (surface finish, soldermask, etc.). However, when a PCB is trimmed, if the copper is too close to the edge, part of this coating can be trimmed as well, exposing the copper layer underneath. This can cause numerous problems in the functionality of the board. For one, it is possible for the exposed copper planes to make contact with one another by simultaneously touching a conductive material, causing a short. This exposure also leaves the copper open to the environment, making it vulnerable to corrosion. This exposure also increases the chance of someone contacting the PCB and receiving an electrical shock. This problem can easily be avoided during DFM by making sure the space between the edge of the copper and the edge of the board, also known as the copper-to-edge or plate-to-edge clearance, follows acceptable standards for the type of board being manufactured.

Drills and Pad Stacks

Drill aspect ratio (board thickness divided by the drilled hole size) and adequate pad sizes to allow for drill registration tolerances need to be taken into the design consideration. Best manufacturability is typically achieved when aspect ratios are ≤ 10:1, where higher aspect ratios may have an impact on yield and cost. Industry standard practice is to select via drill sizes the same as the finished hole size (FHS) whereas component through-holes are typically drilled 3−5 mils over the FHS to allow for plating. The fabricator will have to consider material movement (scaling), and other manufacturing tolerances when doing DFM analysis. A related condition is insufficient annular ring, a very common problem in which a drill size to pad size is insufficient to allow for manufacturing tolerances and result in a breakout of the pad on a signal layer or a potential short in a plane layer.

Figure 2: Insufficient annular ring.

Impedance

Manufacturing controlled impedance printed circuit boards is a combination of design, fabrication, and the ability to model and measure impedance. The best way to calculate trace impedance is by using a trace impedance calculator. You can find trace impedance calculators online or in your CAD software. There are several parameters to consider when determining impedance, including:

• Trace width
• Trace thickness
• Laminate thickness
• Dielectric thickness
• Copper weight

Once all the relevant parameters have been calculated, all of the above can be adjusted to arrive at the impedance needed. Impedance modeling will help with accurate layout and the fabricator will also model for fabrication layer stack-ups to ensure impedance targets are met with standard manufacturable constructions and lowest cost. Typically, the manufacturer will build test coupons on the production panel so that by testing the coupons, a very reliable impedance value can be determined without damaging the board with a time domain reflectometer (TDR) or a network analyzer.

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