DFM: Top Ten PCB Concerns

Estimated reading time: 10 minutes

It is critical to design a way to test the final product once it has been assembled, typically by including test points in the initial design. DFM checks must include test point to component clearances, pad size, under components, and a way to lock down these locations once a fixture is built. Test point data is then used to create an electrical test fixture, or program in the case of a flying probe tester. This is often overlooked during prototype/proof of concept and then added once the design moves into production. The risk in waiting to include test points until after the prototype has been completed is the design change could alter the electronics on the board (which could create crosstalk, noise, and a host of other issues) and therefore not really test the board’s true functionality. This will essentially be altering the design and how the board operates. By incorporating the test points into your board during the design phase and checking for it during DFM, this issue can be completely avoided.

Missing Solder Mask Between Pads

The solder mask is the insulating layer on external layers of the circuit board. Solder mask insulates the traces from accidental contact with other metal, solder or conductive bits. It also acts as a barrier between the copper and the environment, preventing corrosion and protecting the circuit board’s handlers from electrocution. In some circuit boards, the solder mask may be partially or completely absent between pads, especially fine pitch pads. This exposes more copper than is necessary and can result in solder bridges forming accidentally during assembly. This can result in a short, as well as reduced corrosion protection, both of which can negatively affect the functionality and longevity of the circuit board. This defect is commonly due to a design oversight, where the solder mask is undefined or the settings for a larger board are carried over to a smaller board, resulting in clearance that is simply too large for the smaller PCB features. This can be avoided with a proper DFM check protocol at the fabricator before they become a real problem.

Figure 3: Proper solder mask clearance.

Slivers

Slivers are narrow wedges of copper or solder mask produced during the PCB manufacturing process and can cause serious problems during the fabrication of circuit boards. Slivers can be either conductive (copper) or nonconductive (solder mask) and can be avoided with a proper DFM review. Conductive slivers that break off can create an electrical short (either at the fabricator, or worse, in the field). These detached slivers can also float around in a chemical bath, and can potentially redeposit on another board, adding an unintended connection.

Conductive slivers can affect solderability during assembly. For example, a PCB layout containing very thin pieces of copper created in the design tool by rule would be correct per the design intent, and if spaced properly it would pass DRC. However, if that sliver detaches on the physical PCB and inadvertently connects itself to other copper elements during assembly, creating shorts on some PCBs but not on others. Nonconductive slivers can also impact solderability if they detach and redeposit on an area requiring solder, preventing the connection.

These design slivers could pass DRC at the fabricator, but in real-world manufacturing the sliver could cause some PCBs to fail. Without DFM, this problem would go on undetected and would result in scrap or rework. Slivers can be avoided by considering fabrication tolerances during the DFM process.

Starved Thermals

Thermals are small copper connections surrounding a relieved pad in a plane used to electrically connect it to the plane. These thermals allow the pads to more effectively disperse heat and are important components during the soldering process. Sometimes, however, voids between the thermal and the rest of the plane, or the thermal and the pad, can result in an incomplete connection, reducing the effectiveness of the heat transfer system these thermals create. This can result in several functional problems. Starved thermals take much longer to transfer heat from pads to the rest of the plane, which can be problematic during soldering or if the circuit is under heat stress.

A thermal pad with improper heat transfer may solder oddly, and will take an abnormally long time to reflow, slowing down the assembly process. After manufacturing, circuit boards with starved thermals may suffer from insufficient heat transfer and may be more prone to overheating and heat damage. These thermal connections are usually tied correctly to a plane layer in a CAD system but can be compromised during fabrication resulting in a reduced connection to the rest of the plane. A robust DFM process can identify such faulty thermals easily and replace them before they have a chance to cause problems in the circuit board.

Figure 4: Insufficient (starved) thermal design.

Trace and Space

As designs continue to be compressed, etching fine line trace and space becomes increasingly more difficult and can directly affect the manufacturability of the board. Designing a larger trace and space than the minimum industry standard can help control costs and increase manufacturing yields. When possible, design a minimum of 4 mils trace/space on internal layers and 5 mils on external layers for best manufacturability and cost. A related feature—donut rings in copper pour areas—present a two-fold concern: 1) Thin isolated rings of imaging resist are hard to adhere to the board during plating processes; 2) The rings have reduced etch chemistry circulation and are harder to etch clear at smaller sizes.

Via Structures

Many designs work well with standard through vias, but more advanced technology often requires advanced via structures. DFM will help optimize the layer stack-up and board manufacturability while controlling costs. Some common design features that may need advanced via structures include:

1. BGA devices < 0.65 mm, which typically need a combination of microvias and through vias to be manufacturable in volume with good long-term reliability.
2. Blind vias where a cleaner signal return path is needed and/or a footprint with real-estate challenges. Designs with different complexity on each side may need to use a combination of blind and buried vias.

Not Using DFM?

As exemplified by the issues listed above, a number of things can go wrong when designing and fabricating a printed circuit board. These issues can decrease manufacturing yields and increase costs for both the manufacturer and the designer. Worst of all, it can severely extend the time it takes for the product to go from the drawing board to the consumer. A solid DFM process will identify and correct these issues before they become a true problem.

• < Previous Page