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Lee Ritchey Returns to AltiumLive with 32 Gbps Design Class
September 26, 2018 | Andy Shaughnessy, Design007 MagazineEstimated reading time: 9 minutes
Lee Ritchey was one of the instructors for last year’s inaugural AltiumLive event, which drew hundreds of PCB designers. Now, Lee is back, teaching a high-speed design class at next week’s AltiumLive in San Diego. That class is sold-out, but you can catch Lee teaching the same class at the January AltiumLive event in Germany.
I asked Lee to explain what he plans to cover in this course, and why PCB designers and design engineers should consider attending one of the events.
Andy Shaughnessy: Lee, why don’t you tell us about what you're teaching this year at AltiumLive.
Lee Ritchey: Well the course is a one-day seminar, and the title is “Getting to 32 Gigabits Per Second.” We're trying to go up the speed curve again. It's not a question of whether we need to; it's because we can. Many in my class are already doing that. Not everybody is, but lots of people are doing PCI Express, which is more or less the same technology.
Shaughnessy: Right.
Ritchey: And so I realize that in my two-day course, I actually have to cover that topic, because people are afraid of it, like it’s something mysterious. The goal is to take some of the mystery out of that. Because—and I may regret saying this—but it's not as hard as it looks. But you can always say that if you've already done it, right?
Shaughnessy: That’s how it goes.
Ritchey: I mean, as you well know, every year we push the envelope, and so my course is sometimes modified twice a year. What's new? We thought, what the heck? We might as well take this thing and dance it around to the designer. I mean, the engineers are getting a lot of this, the designers not so much. You're not surprised by this, I'm sure. There are lots of myths in circulation that someone needs me to take care of. I kind of think that's my job.
Shaughnessy: Right. What are some of the challenges you run into at that level?
Ritchey: Well, as you might guess, you have to have a sharp pencil. For the last four or five years, if you went to DesignCon, you'd see that we were doing everything we know to reduce the loss in the laminates. The reason for that was that the SERDES were not all that great.
And in between times when we have struggled like crazy to get lower-lost laminates, the people who design the ICs have made them better and better and better. Let's say six or seven years ago, we had to figure out how to deal with only an allowance of 10 db of loss. Which put us right on the edge all the time. Now the latest round of SERDES from companies like Xilinx are able to deal with 38 db of loss, which is massively different. And so now the struggle for below loss is not at the top anymore. A thing called skew is. Skew is a misalignment of the two edges as they come up and enter the receiver.
Shaughnessy: Sure.
Ritchey: And it could be caused by two traces not being the same length, but our designers are good at that. This is something that took the industry by surprise: The glass weave, if it’s not the correct weave, will cause that problem. With E glass, there are two styles that have been used historically for 3 and 4 mil cores (106 and 1080, respectively). And the spec on them is so loose almost anything if you have the right number threads you can call it that. That’s not enough anymore. So what we need is what we call flat glass, meaning that the fibers in the glass have been spread out so that they are uniform across the surface. That happens right now, but not for signal integrity, but for laser drilling. And laser drilling has not as high a requirement as we do for signal integrity. Are you familiar with the problem with laser drilling on glass cloth?
Shaughnessy: Well, I know it’s a hassle.
Ritchey: If you look at a piece of glass cloth that goes into a laminate, normally you'll see that there are glass bundles that are more or less tightly twisted and in between there will be openings that are all resin. And if you're not doing high speed, nobody cares. If you are doing real high-speed signals and your trace is on top of one of those glass bundles, you get one dielectric constant if it’s in between where you are, and in all resin you get a different one. And those result in two very different velocities such that the one that is on the glass bubble is slower than the one that is in the resin.
And it's so bad that at 10 gigabits we have links that simply will never work if you don't have the right glass. By the way, I'm just reviewing a design guide from one of these houses that does contract board layout. And it said to let the fabricator do your stackup. That just becomes a recipe for failure.
Shaughnessy: They can't possibly know everything that they need to know to do a good stackup.
Ritchey: Well at the most fundamental level, very few of them get the impedance right. In fact I just reviewed a stackup from a client who got a test report from a fabricator saying that all the trace layers were 50 ohms. It was a measured report. I've taught the customers to put their own test traces in and measure, and two of the signal layers were 44 ohms. They should have been 50, and the test report said they were 50. I took the fabricator stackup and went through the field solver and it told me it would be 44 ohms, so the fabricator faked everything.
Shaughnessy: Wow.
Ritchey: I'm trying to be polite here. It’s unconscionable how badly that was done. Now this particular fabricator, I have a history with them and if you challenge them, here’s the kind of response you get. “Well, nobody ever checks so it must not matter.” It must not make any difference, because they're not checking. What's really happening is they're having trouble; the customer is having trouble with these boards being marginal and they don't know why. But that's unconscionable for someone to do that. The guy looked me in the eye with a straight face.
Shaughnessy: You could write another book just detailing horror stories.
Ritchey: I don't have enough room! Now, this particular vendor has this history for the last 15 to 20 years. I've lost count how many times I've had to troubleshoot where they've done it wrong. But the engineers let them do it, so you could argue that that's what the engineers deserve for not paying attention.
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