Z-zero Launches v2019.1 of Z-Planner and Z-Solver for PCB Stackup Design

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Z-zero has announced the third major release of its PCB stackup planning software products—Z-planner, for PCB stackup design and materials selection, and Z-solver, for quick, accurate impedance and insertion loss results.

New Features in 2019.1

Bill Hargin, Director of Everything at Z-zero, noted, “This release has a good mix of our own innovation combined with helpful requests from our growing user community.  Our first two releases were tied to building the product architecture and laminate library, and the theme for this release is adding automation for stackup tasks that used to take a good bit of time.”

2019.1 adds full metric system support, enabling hardware teams to work in the units their customers and industries are most accustomed to.  This is, of course, particularly important in automotive and in the European market. Z-zero takes it a step further—allowing users to choose between centimeters (cm), millimeters (mm), or microns (um) for most physical attributes.  

Signal integrity engineers requested single-ended and differential coplanar waveguide support, which are supported in 2019.1.  SI engineers also requested the ability for automated trace width and spacing calculations for target impedances, which is accommodated in this release, including unlimited single-ended and differential-impedance classes and functionality for meeting design requirements with target differential-pitch values.   

The 2019.1 release adds the ability to import additional PCB fabricator stackup formats that were requested by hardware OEMs, as well as ANSYS SIwave and HFSS 3D Layout. 

New laminate libraries are provided, including materials from AGC-Nelco, Nanya Plastics, Ventec, and updates to the TUC (Taiwan Union Corp.) product line.

Z-planner’s patent-pending automated material matching utility—new with 2019.1—allows hardware designers to match materials in existing stackup using up to six different material parameters the materials library with an option to recreate the existing stackup if desired.

Significant Benefits for Digital Hardware Engineering Teams

Most hardware designers are comfortable representing PCB stackups using spreadsheets, so Z-planner is architected to look and operate like one. The tool bridges the sizable gap between the spreadsheets many engineers and fabricators use to describe their stackups and the PCB signal-integrity world — with a super-short learning curve.

Previous releases included import/export interfaces for IPC-2581 and Mentor’s HyperLynx signal-integrity software, allowing users to bring legacy stackups into Z-planner, taking advantage of some of the additional features and functionality in Z-planner, including a 150+ material library and awareness of glass styles, resin contents, pressed prepreg thicknesses, the frequency dependence of dielectric constants (Dk) and dissipation factors (Df), and automation of the PCB stackup design process. Engineering teams that are serious about signal integrity, crosstalk, and power integrity should find Z-planner to be an accuracy-increasing addition to their high-speed design flow, all bundled into a powerful, affordably priced, easy-to-use tool.

About Z-solver

Z-zero’s Z-solver provides the most reasonably priced path to making what-if tradeoffs between Dk, Df, physical trace topologies, and spacing, with results that include single-ended impedance, differential impedance, propagation delay, loss as a function of frequency, and the effects of copper roughness. 

Both Z-planner and Z-solver include the time-tested HyperLynx boundary-element 2D field solver.

About Z-zero

Z-zero, based in Redmond, Washington, develops PCB stackup planning and material-selection software for electronic system design. For further information or to download a free evaluation of the software and stackup-design tutorial, please visit www.z-zero.com.