Elementary Mr. Watson: Routing Hunger Games—May the Traces Be Ever in Your Favor
Target Condition: Floor Planning Without a Floor
Happy’s Tech Talk #42: Applying Density Equations to UHDI Design
Cadence Presented with Four 2019 TSMC Partner of the Year Awards
November 1, 2019 | Business WireEstimated reading time: 1 minute
Cadence Design Systems, Inc. (NASDAQ: CDNS) was presented with four TSMC Partner of the Year awards at the TSMC 2019 Open Innovation Platform® (OIP) Ecosystem Forum. Cadence achieved recognition for the joint development of the N6 design infrastructure, SoIC design solution, cloud-based productivity solution and DSP IP.
These awards were given to Cadence based on the following work that has been delivered:
N6 design infrastructure: Cadence participated in an in-depth collaboration with TSMC on the design infrastructure development of this advanced process technology and has been working with customers on N6 design starts both on production designs and test chips.
SoIC Design Solution: Cadence collaborated with TSMC on the development of a design solution and delivered a reference flow that includes a full suite of Cadence® digital and signoff, custom/analog, and IC package and PCB analysis tools.
Cloud-based TSMC OIP Virtual Design Environment (VDE): Cadence collaborated with TSMC to add the CloudBurst™ Platform to Cadence-managed OIP VDE environments, elevating ease of use and enabling mutual customers to tape out advanced process designs using digital, custom and verification flows delivered via the cloud to improve overall productivity and meet compressed schedules.
DSP IP: Cadence worked with TSMC to enable customers to complete successful projects using the Cadence Tensilica® DSP IP, a widely-used DSP IP in the TSMC portfolio.
“Our continued collaboration with Cadence is enabling our customers to utilize our advanced technologies to design with confidence and meet design goals,” said Suk Lee, TSMC senior director of the Design Infrastructure Marketing Division. “We look forward to seeing our customers unleash their silicon innovations in their respective markets using our advanced N6, TSMC-SoIC®, cloud, and DSP IP solutions.”
“Through our close collaboration with TSMC, we’re enabling mutual customers to consistently deliver successful innovations using our latest technologies,” said Dr. Chin-Chi Teng, senior vice president and general manager of the Digital & Signoff Group at Cadence. “These awards from TSMC exemplify Cadence’s commitment to delivering upon its Intelligent System Design strategy, which enables customers to achieve SoC design excellence.”
Share on:
Testimonial
"We’re proud to call I-Connect007 a trusted partner. Their innovative approach and industry insight made our podcast collaboration a success by connecting us with the right audience and delivering real results."
Julia McCaffrey - NCAB GroupSuggested Items
Mastering PCB Floor Planning
08/28/2025 | Stephen V. Chavez, Siemens EDAPlacement of PCB components is far more than just fitting components onto a board. It’s a strategic and critical foundational step, often called “floor planning,” that profoundly impacts the board’s performance, reliability, manufacturability, and cost. Floor planning ties into the solvability perspective, with performance and manufacturability being the other two competing perspectives for addressing and achieving success in PCB design.
Elementary Mr. Watson: Routing Hunger Games—May the Traces Be Ever in Your Favor
08/26/2025 | John Watson -- Column: Elementary, Mr. WatsonI’d like to share a harsh truth, and I say this as a friend: PCB designers are often their own worst enemy. It’s rarely the complexity of the circuit, the last-minute changes from mechanical, the limited enclosure space, or the ever-expanding list of design rules that send projects to the dust heap of failed boards. More often, it's our own decisions, made too quickly and narrowly, and with too little foresight, that sabotage an otherwise good design.
Target Condition: Floor Planning Without a Floor
08/27/2025 | Kelly Dack -- Column: Target ConditionBy a show of hands, how many PCB designers have been asked to start a layout without a board outline, keep-out zones, or even height constraints? How many have had to work within a specific enclosure before the schematic was finalized? If this sounds familiar, you're not alone. Starting a PCB layout without critical constraints is like hiring an interior designer to buy furniture and carpet for a house you haven’t even purchased yet, or, even worse, trying to fit four bedrooms' worth of furniture in a one-room cabin.
I-Connect007 Editor's Choice: Five Must-Reads for the Week
08/22/2025 | Andy Shaughnessy, I-Connect007In this week’s roundup, we have a variety of articles covering design, manufacturing, sustainability, and, of course, tariff negotiations. We have a milestone anniversary to celebrate as well, with Dan Beaulieu about to publish his 1,000th column. When does Dan even sleep? Here’s to hoping that we have 1,000 more weeks of "It’s Only Common Sense."
New Episode Drop: MKS’ ESI’s Role in Optimize the Interconnect
08/26/2025 | I-Connect007In this latest episode, Casey Kruger, director of product marketing at MKS’ ESI, joins On the Line With… host Nolan Johnson to share how CO₂ laser technology delivers faster, more accurate vias in a smaller, more energy-efficient footprint.