-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueRules of Thumb
This month, we delve into rules of thumb—which ones work, which ones should be avoided. Rules of thumb are everywhere, but there may be hundreds of rules of thumb for PCB design. How do we separate the wheat from the chaff, so to speak?
Partial HDI
Our expert contributors provide a complete, detailed view of partial HDI this month. Most experienced PCB designers can start using this approach right away, but you need to know these tips, tricks and techniques first.
Silicon to Systems: From Soup to Nuts
This month, we asked our expert contributors to weigh in on silicon to systems—what it means to PCB designers and design engineers, EDA companies, and the rest of the PCB supply chain... from soup to nuts.
- Articles
- Columns
Search Console
- Links
- Media kit
||| MENU - design007 Magazine
Insulectro Works to Bridge the Fabricator/Designer Gap
December 19, 2019 | Barry Matties, I-Connect007Estimated reading time: 14 minutes
Creeden: Yes. We’re not attempting to approach the OEMs directly. We’re really trying to accomplish the change with our partners, who are the fabricators.
Matties: On a material supply side, though, they want to go talk to the OEMs first, so their competitors are marketing to the OEMs.
Teta: We are trying to talk to the OEMs more often frequently, but what we’ve learned is who we sell to, and we sell to the fabricators. We have also learned that often, the fabricators know more about some of the programs that their sales teams go into. They know what programs are going to production faster, for example, and what’s going to be released next week versus what might not be done until next year.
Matties: One thing I’ve heard quite often is that designers will over materialize their boards using materials that they don’t need to use or using expensive materials when less expensive materials apply.
Creeden: One of the first questions when considering this subject is, “What is the end quantity that you will be building?” All boards are prototyped first at a low quantity, so it’s irrelevant what the prototype quantity is. It’s typically a “max quantity for a minimum lot charge,” which is often an expression in buying a prototype. Examples of yearly production quantity are 5,000–10,000 or less are considered mid-range, and 1,000 or less are often considered to be a low-production quantity. Therefore, the price in the overall scheme of things may be insignificant. When you’re prototyping, which is low volume, typically, my recommendation is to use the best-in-class material and over-design it because you want to debug your circuit. You do not want to debug a poor material and/or low-quality fabrication. Once you’ve established your circuit’s performance, then you may want to look at any way to reduce costs during the pilot build, if you indeed have a high-end quantity.
Matties: We see a lot of simulation in design. Won’t the simulation supplant that?
Creeden: That’s a great question. We have a new initiative that we’ve taken on at Insulectro in partnership with our fabricators. Over the years, I’ve simulated a lot of boards, and helped a lot of customers as they attempt to simulate. In simulation, depending on the complexity of a circuit, it can be very time-consuming. It can go on for months, and what are the man-hour costs to do that? Simulation can be very difficult. Once you’re done, results are theoretical at best, because it’s done on a computer. The designer can violate some of the constructs that you’ve theoretically arrived at, so it’s subjective. At Insulectro, what we’re developing is an AC-TV (any condition test vehicle) for transmission line analysis in your stackup.
Industry builds characterization boards all the time, whereby they’re testing their chip’s performance and the transmission line over a dielectric within a stackup. What we’re developing is a vehicle without the customer’s chip. The transmission line would be evaluated over a dielectric within a stackup. This could be either used as a coupon on your fabrication panel or a larger test evaluation board.
Matties: A standalone board?
Creeden: Right, meaning fabricating a standalone test vehicle with pico-probes or RF connectors on it and evaluating this through some of the best analysis in the industry. We’ve partnered with DuPont Technology Center in Silicon Valley, where they have that testing capability. What’s different is we’re not just testing one layer of substrate; we’re going to test it as it exists in your stackup and will be built at your fabricator.
Matties: When you are building a prototype, and you know that it is going to be large volumes, should you be designing for the large volumes and testing at that?
Creeden: Absolutely. That’s what would be best termed as a pilot build. Typically, prototyping is mainly doing one or two for the purpose of debugging your circuit. A pilot is geared toward now that. I have a working, functioning circuit, so let’s see if I can build this in high-quantity. Is there any tooling I need, and will it perform using the most cost-effective materials? During the pilot run, you can look and see if this more economical material might still perform and save you pennies because pennies matter in high-quality.
Matties: What advice would you give to a fabricator and designer who might be working together?
Creeden: The question is, “Are they working together at the beginning of the layout cycle?” That’s the key. And if you’ve heard me say it once, you’ll hear it many times; you need to look at this from multiple perspectives because compartmentalized thinking excludes certain aspects that should be looked at. Designing for solvability, designing for performance, and designing for manufacturability are the three perspectives that we need to consider.
Matties: Different dialogues go on between designers and fabricators. What’s the most important dialogue that they should be having?
Creeden: A circuit layout is very nuanced. One example is a 50-ohm transmission line to a digital designer is very different than a 50-ohm transmission line to an RF designer. Another example is if it’s a high-volume, lower layer count board, the cost may be a higher factor. If it’s lower volume, higher layer count board, the cost may not matter as much.
There’s no way to say, “I have one answer that fits all.” It’s about understanding a nuanced approach to looking at every circuit, the quantity you’re going to build, what your company’s profile is, and what your end-user requirements would be. Those are all criteria that need to be looked at specifically to help derive that answer.
Matties: One other area is around DFM. We’re talking about the bare board side of things, but you also mentioned that you must talk to the EMS company, testability, and all these other factors to really have a full DFM picture.
Creeden: Exactly. For example, when people use the term DFM, and they say “manufacturer,” who is the manufacturer? The fabricator sees a board considering all internal layers. The assembler has two layers to focus on, top and bottom, considering soldering, testability, and reliability. There are many different things, such as compliance, and all these things are part of your supply chain and your operations cycle, and each one of them has an aspect that should be considered in the nuance of your development.
Matties: Is there anything that we haven’t talked about that you want to include in this conversation?
Teta: It’s just making sure designers understand what they can do to make a board more easily produced. I’ve learned that often, designers don’t understand all the processes that go into making a board. Making sure they can take something like making the lines a bit wider or making that drill size a little bit larger will increase their chance of getting better yielding. Having that conversation earlier is also better, so they don’t have to go back over the designs.
Matties: One thing that I’ve picked up on is the designers should make the trace and space as wide as possible.
Teta: You don’t have to go as wide as possible.
Matties: Would that be the best, though?
Creeden: It’s a conflicting paradigm because the industry is leading us to go smaller and smaller, and to Megan’s point, it’s harder and harder to manufacture. As solvability requires things to be smaller, the performance is often better, but larger traces and feature sizes often contribute to improved reliability and producibility; therefore, they have competing perspectives.
Matties: Assuming that you fit it into the parameters that are provided.
Creeden: That’s the solvability.
Matties: Making it as robust as you can is the message.
Creeden: Always improve your reliability because reliability, in the end, is what your customers are paying for. And from a manufacturing standpoint, you want your yields as high as you can because that will lower your costs.
Matties: I noticed you had a slide on landless vias yesterday. Tell me what you’re thinking around landless views now.
Creeden: I put that slide in my presentation, stating landless vias were from the past but needed for the future. Landless vias were used in a proprietary OEM’s facility, and it had pretty good success, but it was left with that OEM and not adapted into the mainstay contract manufacturing fabrication process. It’s almost impossible to be built today using current methods, so further testing should occur to proof landless vias. Landless vias work when the annular ring disappears because you rely on the ductility of plated copper versus any kind of foil laminate. As we go to smaller and smaller feature sizes, some sort of landless type of via will be required. I think that the OrMet sintered paste is going to fill that technology need and provide this solution.
Matties: Overall, the case has been made that the reliabilities increase because of the Z-axis movement.
Creeden: The CTE Z-axis mismatch of epoxy vs. copper threatens reliability, therefore, ductility is the best solution to counteract that.
Matties: I’m glad the conversation started because the old becomes new.
Creeden: It does. Landless vias was an innovation back in the day, and we need to return to it because plating high aspect ratio vias is the biggest challenge to the density problem. The OrMet via sintering paste, in my opinion, is going to fill that industry need, and it already is. Most of the cellphones and telecommunications are using that as a mainstay for thin, high layer count boards with one lamination cycle. It avoids a lot of the HDI concerns of multi-lamination with heat excursions. OrMet sintering paste also helps and solves very high aspect ratio drilling-plating problems. A 48/1 aspect ratio via drill-plating problem can be changed into a sub-lam construction, using 4x (12/1 aspect ratio) via-drill and OrMet joining paste.
Matties: Very good. I greatly appreciate you sitting down with us.
Creeden: Thank you. It’s always great to talk to you.
Teta: Thank you, Barry.
Page 2 of 2
Suggested Items
Unlocking Advanced Circuitry Through Liquid Metal Ink
10/31/2024 | I-Connect007 Editorial TeamPCB UHDI technologist John Johnson of American Standard Circuits discusses the evolving landscape of electronics manufacturing and the critical role of innovation, specifically liquid metal ink technology, as an alternate process to traditional metallization in PCB fabrication to achieve ever finer features and tighter tolerances. The discussion highlights the benefits of reliability, efficiency, and yields as a tradeoff to any increased cost to run the process. As this technology becomes better understood and accepted, even sought out by customers and designers, John says there is a move toward mainstream incorporation.
Fresh PCB Concepts: The Critical Nature of Copper Thickness on PCBs
10/31/2024 | Team NCAB -- Column: Fresh PCB ConceptsPCBs are the backbone of modern electronics and the copper layers within these boards serve as the primary pathways for electrical signals. When designing and manufacturing PCBs, copper thickness is one of the most critical factors and significantly affects the board’s performance and durability. The IPC-6012F specification, the industry standard for the performance and qualification of rigid PCBs, sets clear guidelines on copper thickness to ensure reliability in different environments and applications.
Book Excerpt: The Printed Circuit Designer’s Guide to... DFM Essentials, Ch. 1
10/25/2024 | I-Connect007The guidelines offered in this book are based on both ASC recommendations and IPC standards with the understanding that some may require adjustment based on the material set, fabricator processes, and other design constraints. This chapter details high-frequency materials, copper foil types, metal core PCBs, and the benefits of embedded capacitance and resistor materials in multilayer PCBs.
The Cost-Benefit Analysis of Direct Metallization
10/21/2024 | Carmichael Gugliotti, MacDermid AlphaCarmichael Gugliotti of MacDermid Alpha discusses the innovative realm of direct metallization technology, its numerous applications, and significant advantages over traditional processes. Carmichael offers an in-depth look at how direct metallization, through developments such as Blackhole and Shadow, is revolutionizing PCB manufacturing by enhancing efficiency, sustainability, and cost-effectiveness. From its origins in the 1980s to its application in cutting-edge, high-density interconnects and its pivotal role in sustainability, this discussion sheds light on how direct metallization shapes the future of PCB manufacturing across various industries, including automotive, consumer electronics, and beyond.
Connect the Dots: Designing for Reality—Pattern Plating
10/16/2024 | Matt Stevenson -- Column: Connect the DotsIn the previous episode of I-Connect007’s On the Line with… podcast, we painted the picture of the outer layer imaging process. Now we are ready for pattern plating, where fabrication can get tricky. The board is now ready to receive the copper traces, pads, and other elements specified in the original CAD design. This article will lay out the pattern plating process and discuss constraints in the chemistries that must be properly managed to meet the customer's exacting manufacturing tolerances.