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In this issue, we discuss some of the challenges, pitfalls and mitigations to consider when designing non-standard board geometries. We share strategies for designing odd-shaped PCBs, including manufacturing trade-offs and considerations required for different segments and perspectives.
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Mentor Webinar May 26: Customizing DDR4 Designs for Cost and PerformanceMay 21, 2020 | Mentor, a Siemens business
Estimated reading time: Less than a minute
Designers often rely on guidelines provided by controller vendors to drive PCB layout, but following those rules isn’t always possible. DDR layout guidelines can also drive up a board’s manufacturing costs, because they tend to be conservative. Dedicated SI experts have long used pre-layout simulation to develop their own layout rules that optimize design margin and cost for their particular applications, but SI experts are a scarce resource in most organizations.
This webinar will discuss the different design variables that can affect DDR design margin, and show how board and system designers can use HyperLynx pre-layout simulation to develop layout rules that will optimize design margins and minimize cost.
What Attendees Will Learn
- Designing a stackup to meet impedance requirements
- Balancing inter-trace spacing against impedance and crosstalk
- Balancing drive strength and inter-trace spacing against crosstalk
- Using simulation to derive board-level layout rules
- Predicting design operating margins before layout
- Optimizing drive strength and receiver ODT settings
Tuesday, May 26, 2020
2 PM US/Eastern
2 PM Europe/London
10 AM Asia/Singapore
To register, click here.
Cadence’s digital and custom/analog flows are certified on the Intel 18A process technology. Cadence® design IP supports this node from Intel Foundry, and the corresponding process design kits (PDKs) are delivered to accelerate the development of a wide variety of low-power consumer, high-performance computing (HPC), AI and mobile computing designs.
Intel Corp. (INTC) launched Intel Foundry as a more sustainable systems foundry business designed for the AI era and announced an expanded process roadmap designed to establish leadership into the latter part of this decade.
Keysight, Intel Foundry Partner to Certify Electromagnetic Simulation Software for Intel 18A Process Technology02/22/2024 | BUSINESS WIRE
Keysight Technologies, Inc. announces that the RFPro electromagnetic (EM) simulation software, part of the Keysight EDA Advanced Design System (ADS) integrated tool suite, is now certified by Intel Foundry for design engineers targeting Intel 18A process technology.
I-Connect007 has just released the latest episode of its podcast series, On the Line with..., which focuses on designing for reality in the electronics industry. In this episode, host Nolan Johnson talks with ASC Sunstone VP/Manager Matt Stevenson about CAD tool features and data formats that help designers make better decisions and transfer better designs to manufacturing.
Intel Foundry Services (IFS) and Cadence Design Systems, Inc. (Nasdaq: CDNS) announced they have expanded their partnership and entered into a multiyear strategic agreement to jointly develop a portfolio of key customized IP, optimized design flows and techniques for Intel 18A technology featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery.