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Just Ask Joe: Optimum Copper Plating for Thermal Via Farms
August 19, 2020 | I-Connect007 Research TeamEstimated reading time: 1 minute
First, we asked you to send in your questions for Happy Holden. Now, it’s Joe Fjelstad’s turn! Inventor, columnist, instructor, and founder of Verdant Electronics, Joe has been involved with rigid PCBs and flexible circuits for decades, and he’s ready to share some of his knowledge with our readers. We hope you enjoy “Just Ask Joe.”
Q: What is the optimum copper plating thickness for thermal via farms?
A: The question is an important one, but it is not easy, or perhaps even possible, to provide a hard answer to the question as there are many variables to consider. How many vias? What is their pitch? What size (diameter and depth) are they? How much heat needs to be removed? Are they filled with copper or just hole-wall plated? Are they independent features or connected en masse to a copper plane? In a sense, the best answer is perhaps that they collectively resemble the extent possible a copper slug. I would suggest that some thermal modeling of the solution be performed beforehand.
That said, there are some interesting technologies being rolled out at the present time. One is from the Silicon Valley company, Kuprion, which has developed a nanoparticle “copper solder,” which appears worth considering as an alternative to plating vias.
To pose your own question for Joe Fjelstad, click here.
Joe Fjelstad is founder and CEO of Verdant Electronics and an international authority and innovator in the field of electronic interconnection and packaging technologies with more than 185 patents issued or pending. To read past "Flexible Thinking" columns or contact Fjelstad, click here. Download your free copy of Fjelstad’s book Flexible Circuit Technology, 4th Edition, and watch the micro webinar series on flexible circuit technology.
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