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This month, our expert contributors discuss the impact of advanced packaging on stackup design—from SI and DFM challenges through the variety of material tradeoffs that designers must contend with in HDI and UHDI.
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This month, we delve into rules of thumb—which ones work, which ones should be avoided. Rules of thumb are everywhere, but there may be hundreds of rules of thumb for PCB design. How do we separate the wheat from the chaff, so to speak?
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Our expert contributors provide a complete, detailed view of partial HDI this month. Most experienced PCB designers can start using this approach right away, but you need to know these tips, tricks and techniques first.
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Cadence Webinar: Addressing Interconnect Modeling Challenges
December 17, 2020 | Cadence Design SystemsEstimated reading time: Less than a minute
Accurate SI/PI analysis requires ultra-accurate 3D model extraction. Cadence’s Clarity 3D Solver is enabling dozens of PCB and IC packaging teams to perform complex 3D model extractions and create ultra-accurate interconnect models for their most demanding SI/PI simulations, and up to 10X faster than the nearest legacy tool.
This webinar will take you through two test cases—a system-level memory interface and a rigid-flex PCB design—with the following key takeaways:
- Accurate power-aware SI simulations of system-level memory interface, enabled by 3D extractions of full memory bus
- Simulation of Rigid-Flex PCB in both flat and folded states
- Demonstration of what you miss when you do not simulate the folded state
To register for this free webinar, click here.
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Modernizing TAURUS for the Bundeswehr
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SIA Statement on Biden Administration’s Launch of Section 301 Trade Investigation Related to China’s Targeting of the Semiconductor Industry for Dominance
12/25/2024 | SIAThe Semiconductor Industry Association (SIA) released the following statement from SIA President and CEO John Neuffer regarding the Biden administration’s decision to launch a Section 301 trade investigation focused on China’s acts, policies, and practices related to targeting of the semiconductor industry for dominance.
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Overview of Soldering Systems With Vacuum
12/18/2024 | Dr. Paul Wild, Rehm Thermal Systems GmbHWhen soldering electronic assemblies, the focus of the vacuum application is on the removal of volatile substances from the solder joints and the associated reduction of pore formation. Particularly in the thermal management of power electronics components, pores can cause so-called hotspots with higher temperatures due to their poor heat conduction. These hotspots can lead to overheating of the components on the one hand and to thermally induced destruction of the solder structure on the other.