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This month, our expert contributors discuss the impact of advanced packaging on stackup design—from SI and DFM challenges through the variety of material tradeoffs that designers must contend with in HDI and UHDI.
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IPC Releases IPC-7093A, Design and Assembly Process Implementation for BTCs
February 15, 2021 | IPCEstimated reading time: Less than a minute
The long-awaited release of IPC-7093A, Design and Assembly Process Implementation for Bottom Termination Components (BTCs) is here. Revision A is a complete overhaul of IPC-7093 which provides design and assembly guidance for implementing BTCs and focuses on critical design, materials, assembly, inspection, repair, quality, and reliability issues.
IPC-7093A includes a step-by-step process on how to design and incorporate BTCs into any card layout. Comprehensive descriptions on how to successfully implement robust designs and assembly processes and troubleshooting guidance for common anomalies which can occur during BTC assembly are included.
Revision A adds state-of-the-art guidance on critical elements for thermal pad design, thermal via usage, stencil design, assembly recommendations, reliability considerations, known issues/ defects to avoid. The standard’s multiple design point options enable reliable BTC designs.
The standard is ideal for anyone involved with physical design, process and reliability engineers or managers who are responsible for design, assembly, inspection, and repair processes.
“BTCs are in integral part of electronic designs today,” stated Matt Kelly, IPC chief technologist. “With increased product functionality, device miniaturization, and increased power consumption the need for optimized thermal management has never been higher.”
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Effects of Advanced Packaging and Stackup Design
12/26/2024 | I-Connect007 Editorial TeamKris Moyer teaches several PCB design classes for IPC and Sacramento State, including advanced PCB design. His advanced design classes take on some really interesting topics, including the impact of a designer’s choice of advanced packaging upon the design of the layer stackup. Kris shares his thoughts on the relationship between packaging and stackup, what PCB designers need to know, and why he believes, “The rules we used to live by are no longer valid.”
Beyond Design: AI-driven Inverse Stackup Optimization
12/26/2024 | Barry Olney -- Column: Beyond DesignArtificial intelligence (AI) is transforming how we conceptualize and design everything from satellites to PCBs. Traditionally, stackup planning is a manual process that can be multifaceted and relies heavily on the designer's expertise. Despite having best practices and various field solvers to optimize parameters, stackup planning remains challenging for complex designs with advanced packaging, several layers, multiple power pours, and controlled impedance requirements.
Spotlight on PEDC: Filbert Arzola
12/19/2024 | Andy Shaughnessy, Design007 MagazineIPC and FED have teamed up to create a new PCB design conference in Vienna, Austria. The Pan-European Electronics Design Conference (PEDC) takes place Jan. 29-30 at the NH Danube City hotel in Vienna. Raytheon’s Filbert Arzola is presenting “Engineering and Adapting Model-based PCB Design in Step with Sustainability and Digital Twins” at PEDC. I asked Filbert to discuss what attendees can expect from his class.