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Siemens Announces New JEDEC Industry Standard for Electronics Cooling Simulation
June 16, 2021 | SiemensEstimated reading time: 2 minutes
Siemens Digital Industries Software announced the establishment of JEP181—a neutral file, XML-based standard from the JEDEC Solid State Technology Association, which is the global leader in standards development for the microelectronics industry. The JEP181 standard simplifies thermal model data sharing between suppliers and end-users in a single file format called ECXML (Electronics Cooling eXtensible Markup Language).
The new standard was created to meet a significant challenge for electronics manufacturers: as increasingly powerful processors allow companies to pack more performance and functionality into their designs, the effective management of heat dissipation and other thermal factors has become essential to the successful design of their next-generation electronics products. Advanced electronics cooling simulation technologies enable the creation of highly accurate thermal models of new product designs. But the absence of a uniform format for the exchange of thermal simulation data throughout supply chains has created unnecessary duplication of effort and the potential introduction of errors into the stream.
Proposed through the JEDEC JC15 committee, the new JEDEC JEP181 standard simplifies thermal model data sharing. With this universal thermal model sharing standard, electronics manufacturers can reduce the time required to simulate and validate their thermal models.
“The JEP181 standard from JEDEC benefits thermal design engineers by providing wider availability of the key data necessary to validate the thermal performance of today’s advanced designs,” stated Ghislain Kaiser, senior director, Intel Corp. “This standardized format will allow more interoperability between engineering teams, leading to substantial time and cost savings by removing design barriers previously common in thermal engineering.”
Thermal model data availability and sharing is one of the key limiting factors in capitalizing on the benefits of thermal simulation throughout the product design process. Countless hours spent on mining product data sheets for thermal information, or re-implementing 2D engineering drawings within thermal simulation tools, can now be replaced by seamlessly importing commercial 3D simulation tools from software suppliers. The JEP181 standard is ideal for emerging technologies and trends such as miniaturization, 2.5D and 3D semiconductor packaging, and 5G technology-- all of which demand increased power dissipation density.
“As a leader in industrial software solutions, our contribution to the new JEP181 standard can help drive the digitalization of design data to reduce both time and errors for today’s innovative electronics products,” stated Jean-Claude Ercolanelli senior vice president of Simulation and Test Solutions, Siemens Digital Industries Software. “Enabling a seamless digitalized software flow can radically increase the efficiency and accuracy of thermal simulation and thus, enhance the performance and reliability of digital twin prototypes and manufactured products.”
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EMAC Returns with Bright Electronics Manufacturing Challenge 2026
04/30/2026 | SMTAThe Electronics Manufacturing & Assembly Collaborative (EMAC) has announced the return of the Bright Electronics Manufacturing Challenge 2026, an immersive, hands-on student competition that puts real electronics manufacturing experience into the hands of the next generation of engineers.
A Designer's Focus on High Density
04/30/2026 | Marcy LaRont, I-Connect007 MagazineVern Solberg is a distinguished member of the Global Electronics Association Raymond E. Pritchard Hall of Fame and has served as chair or vice chair of many committees, developing technical standards and implementation guidelines, including the IPC-7090 series, which focuses on design for manufacturing and reliability for electronic assemblies. He’s a long-time contributor to Design007 Magazine, and he conducted a half-day tutorial at APEX EXPO 2026, where he addressed 2D, 2.5D, and 3D packaging and ultra-high density hybrid bond interconnect. I caught up with Vern at the show and asked about his pivot from addressing more standard design challenges to his focus on high-density circuits.
Zuken Launches GENESYS 2026 to Broaden Access and Improve MBSE Workflows
04/28/2026 | ZukenZuken announced GENESYS 2026, the latest version of its model-based systems engineering platform, with updates designed to improve performance, expand access to model-based information, and enhance the day-to-day modeling experience for engineering teams.
EDADOC: Building the ‘Neural Hub’ for High-Compute Chips Within a Compact Space
04/28/2026 | ECIOEvery chip to the market must pass a stringent checkpoint before shipment known as ATE testing. Serving as the physical “neural hub” that connects test equipment worth millions of dollars with the device under test, the performance of the ATE test board directly determines the accuracy, efficiency, and final yield of chip testing. Amid the rapid rise of high-compute chips, what extreme challenges is this seemingly small circuit board facing? How is EDADOC addressing industry pain points through its one-stop “design + manufacturing” model?
Cadence Reports Q1 2026 Financial Results
04/28/2026 | Cadence Design SystemsCadence had a strong start to 2026, delivering a solid Q1 with accelerating AI demand and record backlog, reflecting strong customer commitment to our AI-driven portfolio,” said Anirudh Devgan, president and chief executive officer.