Elementary Mr. Watson: Ensuring a Smooth Handoff From PCB Design to Fabrication
The Shaughnessy Report: Breaking Down the Language Barrier
Connect the Dots: Designing for Reality—Routing, Final Fab, and QC
Siemens Announces New JEDEC Industry Standard for Electronics Cooling Simulation
June 16, 2021 | SiemensEstimated reading time: 2 minutes
Siemens Digital Industries Software announced the establishment of JEP181—a neutral file, XML-based standard from the JEDEC Solid State Technology Association, which is the global leader in standards development for the microelectronics industry. The JEP181 standard simplifies thermal model data sharing between suppliers and end-users in a single file format called ECXML (Electronics Cooling eXtensible Markup Language).
The new standard was created to meet a significant challenge for electronics manufacturers: as increasingly powerful processors allow companies to pack more performance and functionality into their designs, the effective management of heat dissipation and other thermal factors has become essential to the successful design of their next-generation electronics products. Advanced electronics cooling simulation technologies enable the creation of highly accurate thermal models of new product designs. But the absence of a uniform format for the exchange of thermal simulation data throughout supply chains has created unnecessary duplication of effort and the potential introduction of errors into the stream.
Proposed through the JEDEC JC15 committee, the new JEDEC JEP181 standard simplifies thermal model data sharing. With this universal thermal model sharing standard, electronics manufacturers can reduce the time required to simulate and validate their thermal models.
“The JEP181 standard from JEDEC benefits thermal design engineers by providing wider availability of the key data necessary to validate the thermal performance of today’s advanced designs,” stated Ghislain Kaiser, senior director, Intel Corp. “This standardized format will allow more interoperability between engineering teams, leading to substantial time and cost savings by removing design barriers previously common in thermal engineering.”
Thermal model data availability and sharing is one of the key limiting factors in capitalizing on the benefits of thermal simulation throughout the product design process. Countless hours spent on mining product data sheets for thermal information, or re-implementing 2D engineering drawings within thermal simulation tools, can now be replaced by seamlessly importing commercial 3D simulation tools from software suppliers. The JEP181 standard is ideal for emerging technologies and trends such as miniaturization, 2.5D and 3D semiconductor packaging, and 5G technology-- all of which demand increased power dissipation density.
“As a leader in industrial software solutions, our contribution to the new JEP181 standard can help drive the digitalization of design data to reduce both time and errors for today’s innovative electronics products,” stated Jean-Claude Ercolanelli senior vice president of Simulation and Test Solutions, Siemens Digital Industries Software. “Enabling a seamless digitalized software flow can radically increase the efficiency and accuracy of thermal simulation and thus, enhance the performance and reliability of digital twin prototypes and manufactured products.”
Share on:
Suggested Items
Würth Elektronik Now an Infineon ‘Preferred Partner’
03/13/2025 | Wurth Elektronik eiSosWürth Elektronik, one of the leading manufacturers of electronic and electromechanical components, is broadening its collaboration with semiconductor manufacturers.
Elementary Mr. Watson: Ensuring a Smooth Handoff From PCB Design to Fabrication
03/13/2025 | John Watson -- Column: Elementary, Mr. WatsonAt the 2020 Tokyo Summer Olympics, the U.S. men's 4x100-meter relay team had high hopes of winning a medal. The team comprised some of the fastest sprinters in the world, but something went wrong. In a relay, four runners must smoothly pass their baton to the next runner inside a zone on the track. If a runner drops the baton or it’s passed outside the zone, the team risks disqualification. The U.S. team’s pass between the second and third runner was messy, slowing them down. By the time the last runner received the baton, the team had lost too much time. They finished sixth in their heat and didn’t qualify for the final.
Ventec International Group Announce Launch of VT-47LT IPC4101 /126 Prepreg for HDI
03/12/2025 | Ventec International GroupVentec International Group announce launch of VT-47LT IPC4101 / 126 Prepreg. Are Microvia Failures Plaguing Your HDI Any Layer Designs? High-density interconnect (HDI) designs are pushing the envelope - higher layer count HDI relies on complex microvia designs: skip vias, staggered microvias, and stacked microvias in sequential laminations.
TI Introduces the World's Smallest MCU, Enabling Innovation in the Tiniest of Applications
03/12/2025 | PRNewswireTexas Instruments (TI) introduced the world's smallest MCU, expanding its comprehensive Arm® Cortex®-M0+ MSPM0 MCU portfolio. Measuring only 1.38mm2, about the size of a black pepper flake, the wafer chip-scale package (WCSP) for the MSPM0C1104 MCU enables designers to optimize board space in applications such as medical wearables and personal electronics, without compromising performance.
Speaking the Same Language as Your Fabricator
03/12/2025 | Andy Shaughnessy, Design007 MagazineWe do indeed have a failure to communicate; designers and fabricators often seem to be talking past each other, which can lead to jobs being put on hold. We asked Jen Kolar, VP of engineering for Monsoon Solutions, and columnist Kelly Dack to share their thoughts on ways that we can break down the communication barrier between design and fabrication. As they point out, a design kickoff checklist and a solid review process can be invaluable tools in a designer’s toolbox.