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Your Thermal Designs Are Inefficient
December 7, 2023 | Douglas Brooks, Consultant, and Johannes Adam, ADAM ResearchEstimated reading time: Less than a minute
![](https://iconnect007.com/application/files/4717/0199/6119/doug_brooks_300.jpg)
Your thermal designs are (probably) inefficient. The inefficiencies are unnecessarily taking up board area and blocking routing channels. This is likely true in at least three areas:
1. Your high-current-carrying traces are probably too wide.
2. You probably use too many vias in your high-current-carrying traces.
3. Any thermal vias you use are (almost) worthless.
Trace Width
Most designers rely on the trace widths suggested in IPC-2152, the “bible” for calculating high-current trace widths (unless you have read our book). IPC-2152 is the best, most thoroughly researched study of trace currents and temperatures available. But it does have some weaknesses. One weakness is that it (by necessity) studies 6-inch-long traces in isolation. But traces are not all 6 inches long nor in isolation. There are nearby design and material parameters that impact trace temperatures, most of them in a downward direction. Perhaps the most important parameter lowering trace temperature is the presence of a plane underlying the trace. Most boards nowadays have such a plane.
To read this entire article, which appeared in the November 2023 issue of Design007 Magazine, click here.
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Catching Up With Tom Yang of CEE PCB
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IPC APEX EXPO 2024: A Preview of the Women in Electronics Reception
03/18/2024 | Alicia Balonek, IPCThis year’s Women in Electronics Reception is scheduled from 6 to 7:30 p.m. Tuesday, April 9. It will feature a panel discussion led by IPC Hall of Famer Karen McConnell, Northrop Grumman, on work-life balance. Panelists include: