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Material Insight: The Importance of Standards for the Chip Packaging Industry

I had the great pleasure of recently attending the National Institute of Standards and Technology’s (NIST) CHIPS R&D Chiplets Interfaces Technical Standards Workshop. The purpose was to bring together technical experts across industry and academia to deliberate one of the most pressing technological matters of 2024: chip packaging standards.

In the semiconductor industry, monolithic chips are widely employed. Herein, all elements of the integrated circuit (e.g., transistors, resistors, interconnects, etc.) are built onto a single chip. By incorporating all aspects of the integrated circuit onto the same chip, the monolithic design or “system on chip” (SoC) simplifies design and can allow for high performance. Meanwhile, “system in package” (SiP) offers a different approach. SiPs employ chiplets where segmented processors (CPU, GPU, memory, etc.) are manufactured as separate chips, and then assembled onto an interposer at a tight pitch (or stacked on top of each other) to form a single, cohesive system.

The benefit is that SiP opens an entirely new world for semiconductor chip design: the ability to mix and match specialized chiplets onto a single package. This allows for greater selection and integration of components for customized applications. SiP also offers a faster time-to-market than SoC because designers can select pre-existing components and integrate them into a single package, streamlining the design process.

But while the concept of SiP is not new to the packaging world, most companies that design products with proprietary interfaces do not allow for interoperability, or the mixing and matching of chiplets from different manufacturers onto a single package. So, where do standards come into play? Standards for interoperability ensure that chiplets from different manufacturers can work together seamlessly without compatibility issues. When chiplets adhere to common design specifications, it becomes easier to integrate them into a single package or system. This is critical for designers who want to mix and match components from various sources to create customized solutions.

“Ideally, we would want the chiplet ecosystem replicating the PCB ecosystem,” says Dr. Ganesh Subbarayan, professor of mechanical engineering at Purdue University. “In other words, it’s procuring chips from multiple vendors and being able to arbitrarily integrate them very close to each other, because the problem comes from a system that consists of multiple chiplets from different sources. If there is no metric, there is no way to understand how any singular changes made in a component can affect the system as a whole.”

Ultimately, the creation of open standards for chiplets would allow for interoperability, lowered barrier to innovation, and encourage the growth of a healthy chiplet ecosystem. Therefore, the purpose of the NIST workshop was to deliberate the development of open standards for the chip packaging industry.

The most pressing topic area from the conference was creating standards for safe data sharing. “Data sharing is not very robust in the sense that different tools from different ecosystems collect and format their data differently,” said one official from the U.S. Department of Commerce. “The lack of standards makes it difficult to share the data across different ecosystems. NIST has done a fair bit of work in this space of data sharing. One thing we propose to do in the near term is to have another workshop that will essentially revisit this idea of data sharing. There are tons of data across the different ecosystems of chip packaging. We need to find a system that facilitates data sharing across these ecosystems. There are currently ongoing activities centered around distributed ledger technologies, such as blockchain technology for sharing data. This is one of the areas we will need to put a lot of effort into.”

As data moves across the chiplet ecosystem, it will inherently pass through several hands. Blockchain technology refers to a decentralized and distributed system for storing and recording information. It allows multiple parties to have a secure, transparent, and tamper-resistant record of transactions without the need for a central authority. While the implementation of blockchain in chip packaging standards is a complex process requiring collaboration among industry participants, the technology has the potential to bring increased transparency and trust to the chip packaging ecosystem.

In other words, if companies are assured that their IP will be protected, the dream of interoperability can become a tangible reality. How far are we from that reality?

“It is going to be sooner than later,” the commerce official stated. “The chiplet-based packaging ecosystem is already here. The question is, how do we harmonize the ecosystem such that we can take a component from one company and marry it to something from another? When the market starts demanding better performance, cost, and availability, we should be ready to help facilitate that change with the appropriate chip packaging standards.”

While there is still much work to be done, the scientific community understands the value of developing these standards. The horizon for chip packaging looks promising.

This column originally appeared in the March 2024 issue of PCB007 Magazine.