-
-
News
News Highlights
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssuePower Integrity
Current power demands are increasing, especially with AI, 5G, and EV chips. This month, our experts share “watt’s up” with power integrity, from planning and layout through measurement and manufacturing.
Signal Integrity
If you don’t have signal integrity problems now, you will eventually. This month, our expert contributors share a variety of SI techniques that can help designers avoid ground bounce, crosstalk, parasitic issues, and much more.
Proper Floor Planning
Floor planning decisions can make or break performance, manufacturability, and timelines. This month’s contributors weigh in with their best practices for proper floor planning and specific strategies to get it right.
- Articles
- Columns
- Links
- Media kit
||| MENU - design007 Magazine
Siemens Delivers New Solido IP Validation Suite
May 7, 2024 | SiemensEstimated reading time: 1 minute

Siemens Digital Industries Software introduced Solido™ IP Validation Suite software, a comprehensive, automated signoff solution for quality assurance across all design intellectual property (IP) types, including standard cells, memories and IP blocks. This new solution provides complete quality assurance (QA) coverage across all IP design views and formats, as well as version-to-version IP qualification for more predictable full-chip IP integration cycles and faster time-to-market.
Integration of off–the-shelf design IP for next-generation semiconductor designs continues to expand due to the quality-enhancing and time-saving advantages of IP reuse and modularization. To achieve silicon success, all IP must be validated for correctness and consistency early in the design flow, as issues discovered late in the design cycle may result in costly tapeout revisions or silicon re-spins.
Design IP is articulated in multiple design views such as logical, physical, electrical, timing, and power analysis contexts. However, thoroughly validating IP across all these perspectives and formats can be particularly time-consuming, often leading to significant production schedule delays.
The Solido IP Validation Suite helps to minimize these delays by providing production and integration teams with automated, comprehensive and customizable IP validation capabilities. The suite includes Siemens’ Solido™ Crosscheck™ software and Solido™ IPdelta™ software, both of which provide a comprehensive set of IP QA checks targeted for all types of design and foundational IP, incorporating in-view, cross-view, and version-to-version QA checks in a streamlined solution. The Solido IP Validation Suite offers rapid, full-flow coverage QA for IP production and integration teams through advanced features like smart parsing for IP data re-use, additive IP QA for automatic change identification and merging of QA reports, and seamless integration with industry-leading verification platforms like Siemens' Calibre® platform.
“With the increasing importance of design IP in semiconductor design, efficient and correct IP validation becomes a critical step towards silicon success,” said Amit Gupta, vice president and general manager, Custom IC Verification, Siemens Digital Industries Software. "The Solido IP Validation Suite provides a scalable and repeatable solution to identify and prevent design-breaking issues, helping IP production teams achieve high-quality IP delivery at every iteration, and helping chip-level design teams achieve faster tape-out schedules with fully qualified, easier-to-integrate design IP.”
Testimonial
"Our marketing partnership with I-Connect007 is already delivering. Just a day after our press release went live, we received a direct inquiry about our updated products!"
Rachael Temple - AlltematedSuggested Items
Analog Devices Launches ADI Power Studio™ and New Web-Based Tools
10/14/2025 | Analog Devices, Inc.Analog Devices, Inc., a global semiconductor leader, announced the launch of ADI Power Studio, a comprehensive family of products that offers advanced modeling, component recommendations and efficiency analysis with simulation. In addition, ADI is introducing early versions of two new web-based tools with a modernized user experience under the Power Studio umbrella:
Cadence Giving Foundation Announces Multi-Year Commitment to Expand the AI Hub at San José State University
10/13/2025 | Cadence Design Systems, Inc.The Cadence Giving Foundation today announced a multi-year commitment to expand the AI Hub at San José State University (SJSU) to equip students with the skills, hands-on training and experience needed to excel in careers in artificial intelligence (AI).
NEDME Returns October 22 — The Northwest’s Premier Design & Manufacturing Expo
10/13/2025 | NEDMEThe Northwest Electronics Design & Manufacturing Expo (NEDME) returns on Wednesday, October 22, 2025, at Wingspan Event & Conference Center, Hillsboro. The event brings together engineers, product designers, manufacturers, educators, and community partners for a full day of industry connection, learning, and networking.
Sumitomo Riko Boosts Automotive Design Efficiency 10x with Ansys AI Simulation Technology
10/13/2025 | SynopsysSumitomo Riko is implementing Ansys, part of Synopsys, Inc. AI technology to accelerate time-to-solution and improve efficiency during the design and manufacturing of automotive components.
Elementary, Mr. Watson: High Power: When Physics Becomes Real
10/15/2025 | John Watson -- Column: Elementary, Mr. WatsonHave you ever noticed how high-speed design and signal integrity classes are always packed to standing room only, but just down the hall, the session on power electronics has plenty of empty chairs? It's not just a coincidence; it's a trend I've observed over the years as both an attendee and instructor.