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The Shaughnessy Report: A Stack of Advanced Packaging Info

It’s holiday time again. Where did the year go? I actually have a jump on decorating—I never took the mistletoe off my mantel.

So it’s only fitting that this issue on advanced packaging and stackup features a “stackup” of “packages” on the cover. There’s certainly a lot to “unpack” in this issue. (Okay, I’ll stop.)

As advanced packaging moves further into the mainstream of PCB design, more PCB designers and design engineers are realizing this isn’t a plug-and-play technology. As we see in the December 2024 issue of Design007 Magazine, advanced packaging can have an impact on the entire design—the stackup in particular.

Advanced packages usually require HDI or UHDI technology, which demands sequential lamination. When designing boards with advanced packages, designers must choose materials that can withstand multiple lamination thermal cycles. These high-speed materials are ultra-thin and without reinforcement, which can lead to challenges with layer-to-layer misregistration. Sequential lamination requires plating on the inner layers. It all adds up to more potential DFM issues during fabrication.

But with a little research, planning, and collaboration with the fabricator, any seasoned PCB designer can utilize this technology. With the constant demand for ever-smaller electronic devices, advanced packaging might be exactly what designers need.

This month, we asked our expert contributors to discuss the impact of advanced packaging on stackup design—from SI and DFM challenges through the variety of material tradeoffs that designers must contend with in HDI and UHDI. Kris Moyer kicks us off with a conversation about the complex interrelationship between advanced packaging and stackup design. Cherie Litson explains why many old rules no longer apply, particularly regarding stackup, HDI, and UHDI.

Columnist Barry Olney covers an interesting idea: AI-driven inverse stackup optimization. Columnist Kelly Dack discusses advanced packaging through the view of the Gartner Hype Cycle methodology; that’s a new one for me. Columnist Vern Solberg takes a deep dive into the current and emerging semiconductor and material technologies that can affect stackup design.

We also have an interview with IPC’s Peter Tranitz, who discusses the new Pan-European Electronics Design Conference, set for Vienna, Austria in January. Anaya Vardya brings us part two of his series on UHDI bleeding-edge manufacturing applications, and we have columns from our regular contributors Matt Stevenson and Joe Fjelstad.

I hope you all get to spend time with your families during the holidays. You deserve some time off.

This column originally appeared in the Decembe 2024 issue of Design007 Magazine.