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Keysight, Synopsys Deliver an AI-Powered RF Design Migration Flow
June 6, 2025 | BUSINESS WIREEstimated reading time: 2 minutes
Keysight Technologies, Inc. and Synopsys, Inc. introduced an AI-powered RF design migration flow to expedite migration from TSMC’s N6RF+ process to N4P technology, to address the performance requirements of today’s most demanding wireless integrated circuit applications. Building on TSMC’s Analog Design Migration (ADM) methodology, the new RF design migration workflow integrates RF solutions from Keysight and the AI-powered RF migration solution from Synopsys to streamline the redesign of passive devices and design components to TSMC’s more advanced RF process rules.
RF circuit designers can now use AI technologies for RF design migration with TSMC’s ADM methodology. Beyond the productivity gains offered by ADM, the Keysight and Synopsys migration workflow leverages the performance gain of the N4P process for the LNA design migrated from N6RF+. Key components of the design migration flow include the Synopsys Custom Compiler™ layout environment with Synopsys ASO.ai™ for rapid analog and RF design migration, Synopsys PrimeSim™ circuit simulator, and Keysight RFPro for device parameterization, automated value fitting, and electromagnetic (EM) simulation.
AI enables and aids RF circuit designers in a novel way to rapidly achieve the migration process and redesign to the N4P process, resulting in faster time-to-market. Synopsys Custom Compiler, along with ASO.ai, an AI-driven analog design migration solution, identifies optimal design parameters to meet performance metrics. Keysight RFPro enables parameterization of passive devices, including inductors, and automatically re-creates simulation models with layouts tuned to the new process rules.
Sanjay Bali, Senior Vice President of Strategy and Product Management at Synopsys, said: “Analog design migration is a challenging and time-intensive process requiring significant trial and error. Our deep collaboration with Keysight Technologies and TSMC enables design teams to boost their productivity with an AI-powered RF design migration flow to accelerate the redesign process and deliver RF designs more efficiently, while achieving the best PPA (Power, Performance, and Area) on TSMC’s advanced nodes.”
Niels Faché, Senior Vice President of Keysight’s Design Engineering Software, said: “Meeting PPA requirements while adhering to new process design rules is one of the biggest challenges facing complex RF chip designs. RF circuit designers want to leverage and reuse their libraries of N6RF+ devices and component intellectual property to improve ROI. The deployment of Synopsys ASO.ai for efficient analog design migration and Keysight RFPro for passive device modeling within TSMC’s ADM methodology facilitates accelerated redesign in the advanced TSMC N4P technology for existing components originally built in N6RF+. No time-consuming data handoffs or domain specialization are required, which increases overall engineering productivity for RF circuit designers.”
Lipen Yuan, Senior Director of Advanced Technology Business Development at TSMC said: “We offer a powerful combination of advanced logic and mixed signal/radio frequency (MS/RF) technologies, enabling our customers to design differentiated wireless connectivity products. Through collaboration with our Open Innovation Platform® (OIP) design ecosystem partners such as Keysight and Synopsys, we’re delighted to deliver a highly efficient RF design migration flow. This enables our customers to quickly transition their designs to more advanced processes, maximizing performance and power efficiency benefits while accelerating time-to-market.”
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Julia McCaffrey - NCAB GroupSuggested Items
PEDC Call for Abstracts Deadline Extended to Aug. 31
08/20/2025 | I-Connect007 Editorial TeamThe second Pan-European Electronics Design Conference (PEDC) will take place Jan. 21-22, 2026, in Prague, Czech Republic. The call for abstracts deadline has been extended to Aug. 31. Organized jointly by the German Electronics Design and Manufacturing Association (FED) and the Global Electronics Association (formerly IPC), PEDC serves as a European platform for knowledge exchange, networking, and innovation in electronics design and development.
Meet the Round 1 Winners of the Bright Manufacturing Student Challenge 2025
08/20/2025 | Tara Dunn, SMTAThe Bright Manufacturing Student Challenge is an opportunity for student teams to design and develop innovative solutions for real-world electronics manufacturing problems. The eight-week competition, sponsored by the Electronics Manufacturing & Assembly Collaborative (EMAC) through electronicsworkforce.com, allows students to showcase their technical skills, creativity, and problem-solving abilities.
University Of Minnesota Team Claims Victory In Bright Manufacturing Challenge 2025 Round 1
08/19/2025 | EMACThe Electronics Manufacturing & Assembly Collaborative (EMAC) recently announced that Team "Rise and Grind Crew" from the University of Minnesota has emerged victorious in Round 1 of the Bright Manufacturing Challenge 2025.
Happy’s Tech Talk #42: Applying Density Equations to UHDI Design
08/19/2025 | Happy Holden -- Column: Happy’s Tech TalkWith the need for faster speeds, more parts on an assembly, and the trend to make things smaller for portability, the printed circuit design and layout process is both creative and challenging. The process involves “applying the density equation” while considering certain boundary conditions, such as electrical and thermal performance. Unfortunately, many designers don’t realize there is a mathematical process to laying out a printed circuit.
Flexible Circuit Technologies to Host Free Flex Heater Webinar
08/18/2025 | Flexible Circuit TechnologiesGlobal Supplier of flexible circuits, flex design services, and assembly/box-build services, Flexible Circuit Technology will host their latest webinar, "Thermal Precision Meets Flexibility: The Technology Behind Heater Circuits" on Tuesday, August 26th, 2025 at 11 AM EDT.