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Keysight, Synopsys Deliver an AI-Powered RF Design Migration Flow
June 6, 2025 | BUSINESS WIREEstimated reading time: 2 minutes
Keysight Technologies, Inc. and Synopsys, Inc. introduced an AI-powered RF design migration flow to expedite migration from TSMC’s N6RF+ process to N4P technology, to address the performance requirements of today’s most demanding wireless integrated circuit applications. Building on TSMC’s Analog Design Migration (ADM) methodology, the new RF design migration workflow integrates RF solutions from Keysight and the AI-powered RF migration solution from Synopsys to streamline the redesign of passive devices and design components to TSMC’s more advanced RF process rules.
RF circuit designers can now use AI technologies for RF design migration with TSMC’s ADM methodology. Beyond the productivity gains offered by ADM, the Keysight and Synopsys migration workflow leverages the performance gain of the N4P process for the LNA design migrated from N6RF+. Key components of the design migration flow include the Synopsys Custom Compiler™ layout environment with Synopsys ASO.ai™ for rapid analog and RF design migration, Synopsys PrimeSim™ circuit simulator, and Keysight RFPro for device parameterization, automated value fitting, and electromagnetic (EM) simulation.
AI enables and aids RF circuit designers in a novel way to rapidly achieve the migration process and redesign to the N4P process, resulting in faster time-to-market. Synopsys Custom Compiler, along with ASO.ai, an AI-driven analog design migration solution, identifies optimal design parameters to meet performance metrics. Keysight RFPro enables parameterization of passive devices, including inductors, and automatically re-creates simulation models with layouts tuned to the new process rules.
Sanjay Bali, Senior Vice President of Strategy and Product Management at Synopsys, said: “Analog design migration is a challenging and time-intensive process requiring significant trial and error. Our deep collaboration with Keysight Technologies and TSMC enables design teams to boost their productivity with an AI-powered RF design migration flow to accelerate the redesign process and deliver RF designs more efficiently, while achieving the best PPA (Power, Performance, and Area) on TSMC’s advanced nodes.”
Niels Faché, Senior Vice President of Keysight’s Design Engineering Software, said: “Meeting PPA requirements while adhering to new process design rules is one of the biggest challenges facing complex RF chip designs. RF circuit designers want to leverage and reuse their libraries of N6RF+ devices and component intellectual property to improve ROI. The deployment of Synopsys ASO.ai for efficient analog design migration and Keysight RFPro for passive device modeling within TSMC’s ADM methodology facilitates accelerated redesign in the advanced TSMC N4P technology for existing components originally built in N6RF+. No time-consuming data handoffs or domain specialization are required, which increases overall engineering productivity for RF circuit designers.”
Lipen Yuan, Senior Director of Advanced Technology Business Development at TSMC said: “We offer a powerful combination of advanced logic and mixed signal/radio frequency (MS/RF) technologies, enabling our customers to design differentiated wireless connectivity products. Through collaboration with our Open Innovation Platform® (OIP) design ecosystem partners such as Keysight and Synopsys, we’re delighted to deliver a highly efficient RF design migration flow. This enables our customers to quickly transition their designs to more advanced processes, maximizing performance and power efficiency benefits while accelerating time-to-market.”
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Julia McCaffrey - NCAB GroupSuggested Items
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Ansys 2025 R2 Enables Next-Level Productivity by Leveraging AI, Smart Automation, and Broader On-Demand Capabilities
07/30/2025 | PRNewswireAnsys, now part of Synopsys, announced 2025 R2, featuring new AI-powered capabilities across the portfolio that accelerate simulation and expand accessibility.
Connect the Dots: Sequential Lamination in HDI PCB Manufacturing
07/31/2025 | Matt Stevenson -- Column: Connect the DotsAs HDI technology becomes mainstream in high-speed and miniaturized electronics, understanding the PCB manufacturing process can help PCB design engineers create successful, cost-effective designs using advanced technologies. Designs that incorporate blind and buried vias, boards with space constraints, sensitive signal integrity requirements, or internal heat dissipation concerns are often candidates for HDI technology and usually require sequential lamination to satisfy the requirements.
Target Condition: The 5 Ws of PCB Design Constraints
07/29/2025 | Kelly Dack -- Column: Target ConditionHave you ever sat down to define PCB design constraints and found yourself staring at a settings window with more checkboxes than a tax form? You’re not alone. For many designers—especially those newer to the layout world—the task of setting up design constraints can feel like trying to write a novel in a language you just started learning.