Chiplets and the Like are Redefining Microelectronics

Estimated reading time: 4 minutes

The performance of modern AI and high-performance computing applications can only be achieved with high-performance semiconductor technology. Advanced Packaging enables several processing units to be accommodated on a single chip, which greatly increases the power density. At productronica—the world’s leading trade fair for the development and production of electronics—the industry will meet in Munich from November 18 to 21, 2025 to discuss the latest trends. The conceptual and technical sponsor of the trade fair is the VDMA Productronic department.

In recent years, silicon scaling has been the route to improved technological performance, but today this effect can no longer meet the industry’s requirements for higher data speeds, for example: As the cost of manufacturing an IC is constantly increasing, the industry can no longer rely on the development of smaller transistors.

One solution to overcome this problem is the introduction of Advanced Packaging based on chiplet-based design, heterogeneous integration, multi-chip modules or system in package. These technologies require efficient production in terms of process capabilities, capacities and cost-effectiveness.

According to a report by the Yole Group, the Advanced Packaging industry attained a market value of USD 37.8 billion in 2023. The ‘Mobile & Consumer’ sector accounted for more than 70 percent of the total revenue, but according to the experts, it is the ‘Automotive’ and ‘Telecommunications & Infrastructure’ sectors that are set to grow significantly in the coming years. The analysts at Yole also expect the market for Advanced Packaging to be worth USD 69.5 billion by 2029.

2.5D, 3D, System in Package (SiP) are the most commonly used methods

Dominant technologies in Advanced Packaging are currently 2.5/3D, Flip Chip, (SiP) and chiplets. Other production processes such as Fan Out, Embedded Die or WLCSP, on the other hand, achieve low market share. Developments in particular in 2.5D, 3D, chiplet and SiP technology, in which manufacturers combine various functional units on a die using a common package, represent the future of Advanced Packaging.

Chiplet technology is based on dividing complex processors into several specialized smaller chips, known as chiplets, each of which performs different functions such as CPU, GPU, I/Os or caches. The chiplets are then connected via fast interconnects in a common package, where they work together like a single large chip.

In 2.5D and 3D technology, manufacturers try to connect two or more chips together in the most efficient and space-saving way possible. With 2.5D, the chips are placed next to each other on an interposer, which enables a high density and communication between the units. Even higher integration and power density can be achieved with 3D technology, in which manufacturers stack several chips on top of each other.

Supply chains become more complex

An important topic is the extended supply chains with Advanced Packaging. In this context, digitalization and data networking are among the technical challenges of the last few years in the semiconductor sector. For example, production requires special substrates/interposers that are expensive and only available from a small number of suppliers.

The technical demands on the test procedures are also increasing due to the fine structures. This also makes supply chains more volatile, as complex tests mean more time, higher costs and hence greater financial risk. In addition, faulty microbumps or bonding errors could have fatal consequences, which means that new inspection methods such as AI-supported X-ray inspections are required.

Research and cutting-edge technology Made in Europe

Innovative application examples for Advanced Packaging will be shown at the VDMA Special Exhibit area: Research institutes such as Silicon Austria Labs, or PhoenixD will be showing the latest developments, such as micro-optical systems on glass substrates for tap-proof telecommunications. Schweizer Electronic will be presenting its embedding technology as a solution for applications in power electronics, also highlighting the production techniques.

In addition to the semiconductor manufacturers themselves, research and development also plays a key role in the field of Advanced Packaging. For example, the Fraunhofer Institute for Reliability and Microintegration IZM has developed the Future Packaging production line, which will be part of productronica 2025. Exhibitors such as Asys, F&K Delvotec and Fuji will be taking part in the special show. The Future Packaging production line aims to examine how a higher degree of digitalization and automation can make production processes more robust against disruptions and external influences.

Another important research area is the pilot line for Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems (APECS), which is being implemented as part of the EU Chips Act. Its aim is to drive forward chiplet innovations and increase research and production capacities for semiconductors in Europe. One focus of APECS is quasi-monolithic integration (QMI), in which chips are integrated into chips and stacked directly on top of each other. APECS is also set to become Europe’s leading hub for Advanced Packaging and play a key role in Europe’s microelectronics industry.

Ideal platform for exchange

At the VDMA Innovation Forum, visitors to the trade fair can learn about the latest Advanced Packaging technologies in lectures given by experts.

They will examine trends and technologies up close and look at technical, economic and political perspectives. Networking events at productronica and SEMICON Europa will also allow visitors to make important contacts and share with industry experts in a relaxed atmosphere.

Under the motto “the pulse of innovation”, more than 1,400 exhibitors will gather in November at the world’s leading trade fair for the development and production of electronics in Munich. At the same time, SEMICON Europa invites visitors to find out about the entire value chain of the semiconductor industry in Halls B1, C1 and C2.