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Connecting the Dots: The CAD Library, Part 2

Padstacks

When we left off last month, we were using the simple example of a capacitor connected to vias, which are the plated holes that connect conductive layers together. Let’s take a quick look at plated holes, because they can also be stored as library parts.

Holes of various diameters will be needed for vias. Vias will be used for circuit board mounting holes, for leaded components and for SMT components that require holes for alignment pins or for additional mechanical support.

The elements for a plated hole are created using the same method as the surface mount capacitor in the previous example, with the addition of a drilled-hole definition. We won’t need anything on the silkscreen layers, but we will need an opening in the top and bottom solder mask layers. We also need a conductive shape for the surface layers, usually round instead of rectangular, and we may also need round pads on the internal signal layers.

You may prefer different diameters on different layers, an approach that most CAD systems support. Plane layers are treated differently than signal layers, because if the plated hole is connected to the plane we will often use a shape that will provide thermal relief (we’ll cover thermal relief later), but if it is not connected to the plane we need to add a clearance diameter. As vias or other plated hole types are used in the design, the CAD software will assign connection or clearance shapes automatically, as needed.

Read the full column here.Editor's Note: This column originally appeared in the August 2013 issue of The PCB Design Magazine.