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SiSoft and MathWorks Present Design Flow to Create AMI Models from SerDes Design DataJanuary 21, 2016 | SiSoft
Estimated reading time: 2 minutes
Signal Integrity Software Inc. (SiSoft) and MathWorks will present the technical paper, “Two for One: Leveraging SerDes Flows for AMI Model Development,” today at DesignCon 2016 in Santa Clara. This paper presents a process that lets SerDes designers directly leverage models created during the SerDes design process to create IBIS-AMI simulation models. AMI models can then be provided to customers much earlier in the SerDes lifecycle, allowing feedback on applicability for customer applications while there is still time to adapt the actual design.
“AMI model development typically occurs only after the SerDes design has been finalized,” noted Barry Katz, SiSoft’s President and CTO. “AMI models are also generally created by a different group, so some knowledge of the original design intent gets lost in translation. This flow lets SerDes engineering create AMI quickly and efficiently. Reusing SerDes design models for AMI development has been a longstanding, but previously unattainable goal for many design teams.”
The flow being presented allows mixed Simulink/MATLAB models to be used for AMI model creation. The user identifies the variable parameters to be exposed in the AMI model, with the process creating the resulting C++ and AMI model wrapper code automatically. The flow uses a closed loop process to compare the behavior of Simulink/MATLAB models with their compiled AMI counterparts to ensure that the resulting AMI models correctly reflect the design’s intended behavior.
“Working with SiSoft allowed us to validate the quality of the generated models,” said Corey Mathis, Industry Marketing Manager for MathWorks. “Our customers wanted to ensure that the compiled AMI models provided the same results as their Simulink simulations, and the flow we created with SiSoft verifies that.”
SiSoft will be exhibiting at Booth 935 during DesignCon 2016. DesignCon 2016 is happening January 19-21, 2016 at the Santa Clara Convention Center.
SiSoft collaborates with customers and their suppliers to develop innovative solutions to the world’s toughest high-speed design problems. SiSoft accelerates design cycles through a combination of award-winning EDA simulation software, methodology training and support services. Quantum Channel Designer (QCD) is the Industry’s Premier IBIS-AMI Simulator for the design and analysis of Multi-Gigabit serial links and a DesignVision Award Winner. Quantum-SI (QSI) is the leading solution for integrated signal integrity, timing and crosstalk analysis of high-speed parallel interfaces. SiSoft’s products automate comprehensive pre- and post-route analysis of high speed interfaces, detailing a design’s operating voltage and timing margins. More information on SiSoft can be found at www.sisoft.com.
DesignCon, produced by UBM Canon, is the world's premier conference for chip, board and systems design engineers in the high-speed communications and semiconductor communities. DesignCon, created by engineers for engineers, takes place annually in Silicon Valley and remains the largest gathering of chip, board and systems designers in the country. This four-day technical conference and expo combines technical paper sessions, tutorials, industry panels, product demos and exhibits from the industry's leading experts and solutions providers.
Cadence’s digital and custom/analog flows are certified on the Intel 18A process technology. Cadence® design IP supports this node from Intel Foundry, and the corresponding process design kits (PDKs) are delivered to accelerate the development of a wide variety of low-power consumer, high-performance computing (HPC), AI and mobile computing designs.
Intel Corp. (INTC) launched Intel Foundry as a more sustainable systems foundry business designed for the AI era and announced an expanded process roadmap designed to establish leadership into the latter part of this decade.
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I-Connect007 has just released the latest episode of its podcast series, On the Line with..., which focuses on designing for reality in the electronics industry. In this episode, host Nolan Johnson talks with ASC Sunstone VP/Manager Matt Stevenson about CAD tool features and data formats that help designers make better decisions and transfer better designs to manufacturing.
Intel Foundry Services (IFS) and Cadence Design Systems, Inc. (Nasdaq: CDNS) announced they have expanded their partnership and entered into a multiyear strategic agreement to jointly develop a portfolio of key customized IP, optimized design flows and techniques for Intel 18A technology featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery.