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Power Integrity
Current power demands are increasing, especially with AI, 5G, and EV chips. This month, our experts share “watt’s up” with power integrity, from planning and layout through measurement and manufacturing.
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If you don’t have signal integrity problems now, you will eventually. This month, our expert contributors share a variety of SI techniques that can help designers avoid ground bounce, crosstalk, parasitic issues, and much more.
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Register Now for the Mentor PCB Systems Forum
April 15, 2016 | Mentor GraphicsEstimated reading time: Less than a minute
Registration is now open for the Mentor PCB Systems Forum, one day of technical sessions for PCB designers. No matter the software tool you use, the Mentor PCB Systems Forums spans the entire design flow.
Presented in cities around the world, this free event delivers design know-how, tips, and tricks that will help your engineering organization become significantly more productive and efficient regardless of which design tools you currently use. Each forum is free of charge, including lunch and refreshments.
For 2016, Mentor Graphics has expanded the agenda to address the demanding design challenges of the Connected World of mobility and the Internet of Things. This includes multi-board system development, advanced PCB design and manufacturing technologies as well as 3D design with complex form factors.
New this year is the SI/PI track showing how pre- and post-layout signal and power integrity analysis can help optimize product performance, cost, and reliability. IPC representatives will also be on hand, sharing ways to make attendees more competitive as engineers and designers.
The first North American session is scheduled for April 27, 2016 at the Santa Clara Marriott in Santa Clara, California.
To register for a Mentor PCB Systems Forum near you, click here.
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