-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssueSignal Integrity
If you don’t have signal integrity problems now, you will eventually. This month, our expert contributors share a variety of SI techniques that can help designers avoid ground bounce, crosstalk, parasitic issues, and much more.
Proper Floor Planning
Floor planning decisions can make or break performance, manufacturability, and timelines. This month’s contributors weigh in with their best practices for proper floor planning and specific strategies to get it right.
Showing Some Constraint
A strong design constraint strategy carefully balances a wide range of electrical and manufacturing trade-offs. This month, we explore the key requirements, common challenges, and best practices behind building an effective constraint strategy.
- Articles
- Columns
- Links
- Media kit
||| MENU - design007 Magazine
Microvias Can Be Stacked in Certain Package Densities
October 13, 2022 | I-Connect007 Editorial TeamEstimated reading time: 2 minutes

Summit Interconnect’s Gerry Partida recently spoke with the I-Connect007 Editorial Team about his research into root causes of weak microvias. Rather than a single manufacturing process cause, Gerry suggests that microvia reliability is the culmination of several material interactions and that contrary to popular belief, microvias can still be stacked in small, tight packaging densities. He highlights the need for simulation, as well as some of his findings that he plans to publish in a paper at IPC APEX EXPO 2023.
Nolan Johnson: Gerry, I understand your team has been doing some research into microvia stacking and will have a paper at the upcoming IPC APEX EXPO on this topic. What have you been learning?
Gerry Partida: Remember back in the early days of HDI, we would stack microvias as deep and plentiful as we wanted to? Then people started experiencing intermittent failures. Boards got hot, the components would fail, and it went back and forth. Manufacturing did something wrong, the assembler overbaked the boards, and it would go back and forth again. A lot of designs started to suffer, especially certain military products that would stack microvias. We would ask, “Why isn’t it working? Why does it work when it does work?” Most of the microvias that were stacked originally were small BGA packages. They were 0.4 mm or 0.5 mm, and those densities drove you to stack. These designs often were for the commercial OEMs, but if something failed, the commercial guys didn’t come back to discuss the issues.
But for the military guys who have ASICS that cost hundreds of thousands of dollars each, the stakes are much higher. If it is for space, then it can only be assembled once for flight; it cannot be taken off and reused. The military packaging then was a much wider pitch than the commercial guys who were stacking microvias initially.
When we looked at where the failures were happening, they were still happening with the commercial guys who were going three or four deep stacking microvias. They weren’t trying to make short, squatty, wide-diameter microvias because they were using thicker dielectrics to get wider lines for impedance. Consequently, we went for a time where there really didn’t seem to be a problem. Then it became, “We see a fracture at the target pad on the stack of the microvias,” and everybody thought there was a weakness in the electroless copper.
We all came up with these rules of thumb: Don’t stack more than two. A lot of DOEs were done, and they almost always concluded, “Do two stacks, then stagger off.” That seemed to work. Even fabricators we would work with had rules like, “Keep your aspect ratio for a single microvia at 0.75 to one. If you’re stacking them, keep them at 0.6 to one.” That seemed to work; we got good results.
Now, during this time we employed reflow resistance testing to monitor the strength of connections in the finished product. We started learning more about what works, and what doesn’t work. Some designs would slip through, where they do a three-stack on tight pitch, and they were passing. We were asking that if our rule of thumb was only two, then why is it working at three? When you look at the design, it’s a 0.4 mm pitch.
To read this entire conversation, which appeared in the September 2022 issue of PCB007 Magazine, click here.
Testimonial
"Our marketing partnership with I-Connect007 is already delivering. Just a day after our press release went live, we received a direct inquiry about our updated products!"
Rachael Temple - AlltematedSuggested Items
Closing the Loop on PCB Etching Waste
09/09/2025 | Shawn Stone, IECAs the PCB industry continues its push toward greener, more cost-efficient operations, Sigma Engineering’s Mecer System offers a comprehensive solution to two of the industry’s most persistent pain points: etchant consumption and rinse water waste. Designed as a modular, fully automated platform, the Mecer System regenerates spent copper etchants—both alkaline and acidic—and simultaneously recycles rinse water, transforming a traditionally linear chemical process into a closed-loop system.
Driving Innovation: Depth Routing Processes—Achieving Unparalleled Precision in Complex PCBs
09/08/2025 | Kurt Palmer -- Column: Driving InnovationIn PCB manufacturing, the demand for increasingly complex and miniaturized designs continually pushes the boundaries of traditional fabrication methods, including depth routing. Success in these applications demands not only on robust machinery but also sophisticated control functions. PCB manufacturers rely on advanced machine features and process methodologies to meet their precise depth routing goals. Here, I’ll explore some crucial functions that empower manufacturers to master complex depth routing challenges.
Trouble in Your Tank: Minimizing Small-via Defects for High-reliability PCBs
08/27/2025 | Michael Carano -- Column: Trouble in Your TankTo quote the comedian Stephen Wright, “If at first you don’t succeed, then skydiving is not for you.” That can be the battle cry when you find that only small-diameter vias are exhibiting voids. Why are small holes more prone to voids than larger vias when processed through electroless copper? There are several reasons.
The Government Circuit: Navigating New Trade Headwinds and New Partnerships
08/25/2025 | Chris Mitchell -- Column: The Government CircuitAs global trade winds continue to howl, the electronics manufacturing industry finds itself at a critical juncture. After months of warnings, the U.S. Government has implemented a broad array of tariff increases, with fresh duties hitting copper-based products, semiconductors, and imports from many nations. On the positive side, tentative trade agreements with Europe, China, Japan, and other nations are providing at least some clarity and counterbalance.
How Good Design Enables Sustainable PCBs
08/21/2025 | Gerry Partida, Summit InterconnectSustainability has become a key focus for PCB companies seeking to reduce waste, conserve energy, and optimize resources. While many discussions on sustainability center around materials or energy-efficient processes, PCB design is an often overlooked factor that lies at the heart of manufacturing. Good design practices, especially those based on established IPC standards, play a central role in enabling sustainable PCB production. By ensuring designs are manufacturable and reliable, engineers can significantly reduce the environmental impact of their products.