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Shrinking Geometries: Back to Fundamentals to Fight EMI
February 23, 2023 | Andy Shaughnessy, Design007 MagazineEstimated reading time: 1 minute

When silicon shrinks, a variety of things can happen—some positive, some negative. But for PCB designers, the fight against EMI becomes more complex as signal channels shrink and rise times increase.
Dan Beeker is technical director at NXP Semiconductors, a veteran design engineer, and an instructor who has spent years helping students and customers battle EMI through building a better understanding of electromagnetic fields and field theory. In this interview, Dan explains what happens when silicon shrinks, how feature size controls signal speed, and why this marks the perfect time to return to the fundamentals of physics and field theory.
Andy Shaughnessy: Shrinking silicon is increasingly causing EMI issues for PCB designers and EEs. What sort of problems does shrinking silicon cause?
Dan Beeker: Smaller device geometries and higher current switching capabilities have thrust us all into the world of RF, HF, UHF, and microwave energy management. Rise times on even the lowest-tech devices now exhibit gigahertz impact. These changes directly impact product functionality and reliability. When IC technology was described as a percent of shrink from integer design rules, a circuit-based approach was usually close enough. Now that IC technology is described in nanometers, that traditional approach completely falls apart. An EM field, physics-based approach is essential.
To make things worse, EMC standards have changed; we now have lower and higher frequency compliance requirements, much lower emissions levels allowed, and greater immunity required. The playing field and the equipment have completely changed. This really is a brand-new game. The challenges are not only about providing adequate power to the devices, but also managing the output signals. The smaller the transistor, the faster it turns on, and the bigger the impact it has on EMC and signal integrity.
To read this entire interview, which appeared in the February 2023 issue of Design007 Magazine, click here.
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10/01/2025 | John Watson -- Column: Elementary, Mr. WatsonFor the September 2025 issue of Design007 Magazine on signal integrity, I explored how the PCB is similar to a military obstacle course: walls that sap energy like impedance mismatches, barbed wire that cuts like crosstalk, and mud pits that drag a signal down like attenuation. The takeaway was clear that a PCB is not a flat drawing; it's an electromagnetic ecosystem filled with hazards that test every signal that dares to cross it. The real danger lies not in the obstacles themselves, but in the fact that many designers never see them.
Signal Integrity: A Game of Margins
09/25/2025 | Andy Shaughnessy, Design007 MagazineAs the founder of Wild River Technology, Al Neves deals with some of the most challenging aspects of signal integrity. Wild River’s engineers consult with high-tech companies that work at very high speeds and frequencies, often above 100G. Al is always a fun interview, so we asked him to share his thoughts on the current state of signal integrity engineering.
Understanding Signal Integrity, the Foundation of High-Speed Digital Design
09/25/2025 | Stephen V. Chavez, Siemens EDASignal integrity has become a critical factor in ensuring reliable performance in high-speed digital systems. As data rates continue to increase, engineers must understand the fundamental principles that govern how signals propagate through transmission lines and how to mitigate common issues that can degrade signal quality.
Beyond Design: Slaying Signal Integrity Villains
09/17/2025 | Barry Olney -- Column: Beyond DesignHigh-speed PCB design is a balancing act, where subtle oversights can develop into major signal integrity nightmares. Some culprits lie dormant during early validation, only to reveal themselves later through workflow disruptions and elusive performance bottlenecks. Take crosstalk, for example. What begins as a stray signal coupling between traces can ripple through the design, ultimately destabilizing the power distribution network. Each of these troublemakers operates with signature tactics, but they also have well-known vulnerabilities.
Staying on Top of Signal Integrity Challenges
09/16/2025 | Andy Shaughnessy, Design007 MagazineOver the years, Kris Moyer has taught a variety of advanced PCB design classes, both online IPC courses and in-person classes at California State University-Sacramento, where he earned his degrees in electrical engineering. Much of his advanced curriculum focuses on signal integrity, so we asked Kris to discuss the trends he’s seeing in signal integrity today, the SI challenges facing PCB designers, and his go-to techniques for controlling or completely eliminating SI problems.