-
- News
- Books
Featured Books
- design007 Magazine
Latest Issues
Current IssuePower Integrity
Current power demands are increasing, especially with AI, 5G, and EV chips. This month, our experts share “watt’s up” with power integrity, from planning and layout through measurement and manufacturing.
Signal Integrity
If you don’t have signal integrity problems now, you will eventually. This month, our expert contributors share a variety of SI techniques that can help designers avoid ground bounce, crosstalk, parasitic issues, and much more.
Proper Floor Planning
Floor planning decisions can make or break performance, manufacturability, and timelines. This month’s contributors weigh in with their best practices for proper floor planning and specific strategies to get it right.
- Articles
- Columns
- Links
- Media kit
||| MENU - design007 Magazine
Design for Profitability: Avoiding Fabrication Issues and Minimizing Costly Revisions
July 31, 2013 | Mark Thompson, CID, Prototron CircuitsEstimated reading time: 1 minute
Note that I use the term “design for profitability,” or DFP, as opposed to any of the other acronyms such as DFM (design for manufacturability), DFT (design for test), or DFA (design for assembly). I’m taking this approach because it really all comes down to profit, doesn’t it?
Designers have the power to design profit into the board, or, conversely, inadvertently increase costs and remove profit from the PCB. In this article I am going to go over just a few of the challenges that fabricators routinely face and some typical solutions, especially solutions that can affect your bottom line.
I will start with DFM. Generally, this is the first stage for prototyping and DFM depends greatly on the capabilities of your chosen fab shop. Some designs are finished with autorouters after the critical traces have been hand-placed. It is at this point that unintended issues can arise between design and fab.
An example of this is same net-spacing violations where a track may “double back” near a surface mounted component, creating same-net spacing violations (Figure 1). Whereas the software does not see these as legit violations because they are same net, a fabricator knows that any features creating spaces below 0.003” can easily flake off at the image stage and create havoc elsewhere in the form of shorts. Edit time must be taken at the fab stage when these same-net spacing violations occur and the slivers eliminated. Some CAM software packages have a sliver fill option, but again this requires additional edit time at CAM.
Read the full article here.
Editor's Note: This article originally appeared in the March 2013 issue of The PCB Design Magazine.
Testimonial
"Our marketing partnership with I-Connect007 is already delivering. Just a day after our press release went live, we received a direct inquiry about our updated products!"
Rachael Temple - AlltematedSuggested Items
Quilter Secures $25M Series B to Eliminate Manual PCB Design with Physics-Driven AI
10/09/2025 | BUSINESS WIREQuilter, the first and only company to publicly demonstrate fully autonomous PCB layout through physics-driven AI, announced $25 million in Series B funding led by Index Ventures.
The Shaughnessy Report: Watt About Power Integrity?
10/08/2025 | Andy Shaughnessy -- Column: The Shaughnessy ReportYes, that headline is the equivalent of a dad joke, but editors can’t pass up a chance to inject a little humor into a headline, and I had to take my shot. Power integrity (PI) problems are no joke. Current power demands are increasing, especially with AI, 5G, and EV chips, which can lead to voltage drops that kill your performance.
Taking Control of PCB Verification One Step at a Time
10/09/2025 | Kirk Fabbri, Siemens EDAToday’s designs are as complex as ever, and engineers face tough decisions every day. Simulation and verification teams are confronted with a three-fold challenge: understanding the underlying theory, mastering the tools, and applying best practices.Engineers need to navigate a vast and ever-changing cast of design and simulation tools, often with overlapping functionality.
ICT Symposium Review: Sustainability and the Circular Economy
10/09/2025 | Pete Starkey, I-Connect007It was pleasant autumnal weather as we made our way once again to Meriden, the nominal centre of England, for the 2025 Annual Symposium of the Institute of Circuit Technology. Delegates were welcomed by technical director Emma Hudson who introduced and moderated a skilfully coordinated programme, focused on the highly relevant theme of sustainability.
Pulsonix 14.0 Adds Embedded Simulation, Smarter 3D Views, Enhanced Workflow
10/08/2025 | PulsonixPulsonix, the EDA company delivering technology-leading PCB design solutions, is proud to announce the launch of Pulsonix 14.0, its latest PCB design software platform.